IUCRC Phase II Georgia Institute of Technology: Center for Advanced Electronics through Machine Learning [CAEML]

IUCRC 第二期佐治亚理工学院：机器学习先进电子学中心 [CAEML]

• 批准号: 2345055
• 负责人: Madhavan Swaminathan
• 金额: $ 50万
• 依托单位: Pennsylvania State Univ University Park
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2023
• 资助国家: 美国
• 起止时间: 2023-10-01 至 2027-03-31
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2345055&HistoricalAwards=false
• 关键词: IUCRC; Phase; II; Georgia; Institute

The design complexity of modern microelectronic systems, e.g., a chip with over one billion transistors, requires automated design checks and computer simulations for verifying the functionality and reliability of microelectronic components or systems prior to manufacturing. The computer memory and run time tend to increase with design complexity, and therefore it is necessary to adopt a simplified description of the system, with reduced accuracy, to complete the design process in a timely and cost-efficient manner. This project will apply machine learning to microelectronic design verification and optimization, that results in reduced design cycle time, with radically improved accuracy and reliability. CAEML, the Center for Advanced Electronics through Machine Learning, will develop a behavioral, machine-learning approach to hardware modeling, emphasizing the accuracy of the end-to-end system model. Uncertainty quantification is applied to reduce reliance on design guard-banding. CAEML will research techniques for collaborative machine learning (ML), whereby multiple organizations can jointly train ML models using their proprietary design data but without releasing any confidential information. Inverse models will be demonstrated as a feasible approach to design space exploration based on specifications. CAEML includes experts on design and machine learning theory; Georgia Tech provides expertise on optimization and physical design of microelectronics. The microelectronics industry undergirds larger vertical markets, including computing, communications, and transportation. CAEML serves the vitally important microelectronics industry with its research, workforce development, and continuing education programs. CAEML research will improve the efficiency of the design process and the quality of the final product; the first reduces costs and the second directly benefits the public. Microelectronic systems that are both secure and reliable allow government and utilities to provide critical services to the public, while low-power microelectronic systems promote environmental sustainability. CAEML provides the microelectronics industry with a diverse pool of new graduates who have excellent professional preparation. CAEML will maintain a single repository to be used for depositing and dissemination of data, documents, and code across the Center. Repository files will be stored on virtual directories that reside on an Illinois Grainger College of Engineering (GCOE) storage array. The format of the data will be documented with metadata files that provide an explanation of the exact format. The Repository will be backed up regularly, following GCOE standards and practices. Experimental data will be retained for at least three years and as governed by the policies of the institution at which the data were gathered.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

现代微电子系统的设计复杂性，例如具有超过十亿个晶体管的芯片，需要在制造之前进行自动设计检查和计算机模拟，以验证微电子组件或系统的功能和可靠性。计算机内存和运行时间往往会随着设计复杂性的增加而增加，因此有必要采用简化的系统描述，同时降低准确性，以便及时且经济高效地完成设计过程。该项目将把机器学习应用于微电子设计验证和优化，从而缩短设计周期时间，并从根本上提高准确性和可靠性。 CAEML（机器学习先进电子中心）将开发一种行为机器学习方法来进行硬件建模，强调端到端系统模型的准确性。应用不确定性量化来减少对设计保护带的依赖。 CAEML 将研究协作机器学习 (ML) 技术，多个组织可以使用其专有的设计数据联合训练 ML 模型，但不会泄露任何机密信息。反演模型将被证明是一种基于规范设计太空探索的可行方法。 CAEML 包括设计和机器学习理论方面的专家；佐治亚理工学院提供微电子优化和物理设计方面的专业知识。微电子行业支撑着更大的垂直市场，包括计算、通信和运输。 CAEML 通过其研究、劳动力发展和继续教育项目为极其重要的微电子行业提供服务。 CAEML研究将提高设计过程的效率和最终产品的质量；一是降低成本，二是直接惠及大众。安全可靠的微电子系统使政府和公用事业公司能够为公众提供关键服务，而低功耗微电子系统则促进环境的可持续性。 CAEML 为微电子行业提供了一批具有出色专业准备的多元化应届毕业生。 CAEML 将维护一个单一存储库，用于在整个中心存储和传播数据、文档和代码。存储库文件将存储在位于伊利诺伊州格兰杰工程学院 (GCOE) 存储阵列上的虚拟目录中。数据的格式将记录在元数据文件中，元数据文件提供确切格式的解释。存储库将按照 GCOE 标准和实践定期备份。实验数据将保留至少三年，并受收集数据机构的政策约束。该奖项反映了 NSF 的法定使命，并通过使用基金会的智力价值和更广泛的影响审查进行评估，被认为值得支持标准。

项目成果

Surrogate Modeling With Complex-Valued Neural Nets for Signal Integrity Applications

• DOI: 10.1109/tmtt.2023.3319835
• 发表时间: 2024-01
• 期刊: IEEE Transactions on Microwave Theory and Techniques
• 影响因子: 4.3
• 作者: O. Akinwande;Serhat Erdogan;Rahul Kumar;Madhavan Swaminathan

Semantic Autoencoder for Modeling BEOL and MOL Dielectric Lifetime Distributions

用于 BEOL 和 MOL 介电寿命分布建模的语义自动编码器

• DOI: 10.1109/irps48203.2023.10117878
• 发表时间: 2023
• 期刊: 2023 IEEE International Reliability Physics Symposium (IRPS
• 作者: Yan, W.;Wu, E.;Schwing, A.;Rosenbaum, E.
• 通讯作者: Rosenbaum, E.

Machine-Learning-Based Constrained Optimization of a Test Coupon Launch Using Inverse Modeling

使用逆向建模基于机器学习的测试优惠券发射约束优化

• DOI: 10.1109/epeps58208.2023.10314941
• 发表时间: 2023
• 期刊: IEEE 32th Conference on Electrical Performance of Electronic Packages and Systems (EPEPS
• 作者: Page, A.;Chen, X.
• 通讯作者: Chen, X.

Leaking secrets in homomorphic encryption with side-channel attacks

• DOI: 10.1007/s13389-023-00340-2
• 发表时间: 2024-01
• 期刊: Journal of Cryptographic Engineering
• 影响因子: 1.9
• 作者: Furkan Aydin;Aydin Aysu

Surrogate Modeling with Complex-valued Neural Nets and its Application to Design of sub-THz Patch Antenna-in-Package

• DOI: 10.1109/ims37964.2023.10187990
• 发表时间: 2023-06
• 期刊: 2023 IEEE/MTT-S International Microwave Symposium - IMS 2023
• 作者: O. Akinwande;Osama Waqar Bhatti;Kai-Qi Huang;Xingchen Li;Madhavan Swaminathan