Collaborative Research: SHF: Medium: EPIC: Exploiting Photonic Interconnects for Resilient Data Communication and Acceleration in Energy-Efficient Chiplet-based Architectures

合作研究：SHF：中：EPIC：利用光子互连实现基于节能 Chiplet 的架构中的弹性数据通信和加速

• 批准号: 2311543
• 负责人: Ahmed Louri
• 金额: $ 60万
• 依托单位: George Washington University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2023
• 资助国家: 美国
• 起止时间: 2023-08-01 至 2027-07-31
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2311543&HistoricalAwards=false
• 关键词: Collaborative; Research; SHF; Medium; EPIC

The on-chip communication fabric connecting the cores, accelerators and the memory in chiplet-based architectures consumes a significant amount of power today and must be designed to not only provide adequate connectivity and performance, but also be very energy efficient and scalable, to satisfy future computing demands. Silicon photonics has the potential to alleviate some of the on-chip communication problems thanks to better performance-per-watt and higher bandwidth density. A key issue in addressing this design challenge today is the under-utilization of the expensive silicon photonics technology due to temporal and spatial fluctuation of traffic patterns. To make silicon photonics practical and viable, re-purposing the under-utilized resources for computation can speed up application execution and provide much-needed energy-efficient data transfers. The proposed research is timely and vital for the continued growth of chiplet-based heterogeneous manycore architectures. It is an organized effort that combines recent advances in technology, architecture, application, and machine learning into a promising integrated approach that will tackle one of the most critical challenges of computing systems of the future, namely the design of next-generation communication fabrics for high-performance, energy-efficient and scalable heterogeneous architectures with much-increased functionality and flexibility. All the research findings and simulation toolkits will be disseminated to the community via conference and journal publications, and a dedicated website. The research will also play a major role in education by integrating discovery with teaching and training. This research will continue to expand on outreach activities and broadening participation in computing by making the necessary efforts to attract and train underrepresented and minority students in this field. This research will design a novel, dual-purpose photonic fabric that will not only enable power-efficient and scalable on-chip communications for heterogeneous multicores but will also function as a cost-efficient and high-performance neural network accelerator for diverse applications. The crux of the idea is to: (1) provide high-bandwidth and power-efficient data transfer between cores and accelerators during high network load, and (2) off-load key accelerator functions to the same network during low network load to maximize resource utilization and speedup computation, hence the dual-purpose nature of the photonic fabric. It is expected that the combined effects of meticulously orchestrating data communication (on-chip and off-chip), sharing hardware resources between communication and computation, and implementing optical neural computations will provide an extremely power-efficient and scalable platform for next-generation heterogeneous chiplet-based architectures. This research will result in (1) novel photonic architectures that can be leveraged for computing and communication simultaneously, (2) a fundamental understanding of photonic computation for implementing accelerator functions, (3) hardware techniques for photonic architectures to dynamically adapt to application demands to maximize the power-efficiency and improve resiliency, and (4) proof-of-concept and open-source tools that will expand and enhance the research capabilities of the computer architecture community in this critical area.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

连接核心，加速器和基于芯片的体系结构中的内存的片上通信结构，如今消耗了大量的功率，必须设计不仅可以提供足够的连接性和性能，而且还具有非常节能且可扩展的，以满足未来的计算需求。硅光子学有可能减轻一些芯片沟通问题，这要归功于每瓦的性能和更高的带宽密度。应对当今设计挑战的一个关键问题是由于交通模式的时间和空间波动而导致昂贵的硅光子技术的利用不足。为了使硅光子学实用且可行，重新定位未充分利用的计算资源可以加快应用程序执行并提供急需的节能数据传输。拟议的研究对于基于chiplet的异质多核体系结构的持续增长至关重要。这是一种有组织的工作，将技术，建筑，应用和机器学习的最新进展结合到了有前途的集成方法中，该方法将解决未来计算系统最关键的挑战之一，即下一代通信面料的设计，用于高性能，能效，可延展性和可扩展的异构体系结构的功能和灵活性和灵活性。所有研究发现和仿真工具包将通过会议和期刊出版物以及专门的网站传播到社区。这项研究还将通过将发现与教学和培训相结合，在教育中发挥重要作用。这项研究将继续扩大外展活动并通过在该领域吸引和培训代表性不足和少数族裔学生的必要努力来扩大计算机的参与。这项研究将设计一种新型的双重光子光子织物，不仅可以为异构多头堆积提供功率效率且可扩展的片上通信，而且还可以作为一种具有成本效益且高性能的神经网络加速器来用于多样化的应用。该想法的症结在于：（1）在高网络负载期间提供高带宽和功率效率的数据传输，以及（2）在低网络负载期间，（2）卸载密钥加速器功能到同一网络，以最大程度地提高资源利用率和加速度计算，从而最大程度地提高光子织物的双重性质性质。可以预期，精心策划数据通信（芯片和片芯片），在通信和计算之间共享硬件资源以及实施光学神经计算的综合效果将为下一代基于异构芯片架构提供一个极其强大效率且可扩展的平台。这项研究将导致（1）可以利用计算和交流的新型光子体系结构，（2）对实施加速器功能的光子计算的基本了解，（3）光子体系结构的硬件技术，以动态地适应应用程序的需求，以提高效率和稳定性，并提高稳定性和（4）开放性，以及（4）启用稳定性，并（4）启用了（4）启用性工具，以及（4）4）该奖项反映了NSF的法定任务，并被认为是通过基金会的知识分子优点和更广泛的影响评论标准来评估的，这是值得支持的。