CSR: Small: Collaborative Research: GAMBIT: Efficient Graph Processing on a Memristor-based Embedded Computing Platform

CSR：小型：协作研究：GAMBIT：基于忆阻器的嵌入式计算平台上的高效图形处理

• 批准号: 1717885
• 负责人: Hai Li
• 金额: $ 10万
• 依托单位: Duke University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-10-01 至 2020-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1717885&HistoricalAwards=false
• 关键词: CSR; Small; Collaborative; Research; GAMBIT

Recently, graph processing received intensive interests in light of a wide range of needs to understand relationships. Graph analytics are widely used in key domains in our society, such as cyber security, social media, infrastructure monitoring (e.g., smart building), natural language processing, system biology, recommendation systems. These important applications all fall into fast-growing sectors in computer science and engineering research. On the other hand, in many emerging applications, the graph analytics are ideally performed in the edge (e.g., a mobile or embedded system) in order to allow the relationships between events to be discovered in the field where they are unfold. Unfortunately, the existing embedded systems equipped with conventional computing units like CPU/GPU cannot efficiently process large graphs in real time. Instead, large data centers are required to perform the graph processing, either incurring extra latency and energy due to data communication or only providing forensic (offline) graph analysis. This research aims to effectively enable graph analytics in embedded system with disruptive emerging technology. To support graph analytic applications with the limited hardware resources in embedded systems, this project seeks to develop GAMBIT -- a memristor-based embedded computing framework for efficient graph processing. Our research program aims to develop multi-layer techniques to enable highly efficient (e.g., 1000X) and scalable real-time graph analytics in embedded systems (i.e., network edge). It contains research efforts across circuit, architecture, system and vertical integration. (1) At the circuit level, the project proposes a memristor-based graph computing core to enable efficient computations for graph processing. (2) At the architecture level, the project proposes the complete memristor-based graph processing architecture for partitioned graph and various algorithms. (3) At the system level, the project develops a graph analytics framework for embedded systems and integrates it with a popular embedded OS. (4) For integration, the project proposes to develop an emulator of the proposed architecture and cross-layer HW/SW co-design techniques. This project contributes to society through engaging high-school and undergraduate students from minority-serving institutions into research, attracting women and under-represented groups into graduate education, expanding the computer engineering curriculum with graph processing and other emerging applications in embedded systems, disseminating research infrastructure for education and training, and collaborating with the industry.

最近，根据了解关系的广泛需求，图形处理获得了密集的兴趣。图分析被广泛用于我们社会的关键领域，例如网络安全，社交媒体，基础设施监控（例如智能建筑），自然语言处理，系统生物学，推荐系统。这些重要的应用都属于计算机科学和工程研究中快速增长的领域。另一方面，在许多新兴应用中，理想情况下，图形分析是在边缘（例如移动或嵌入式系统）中执行的，以允许在展开的现场发现事件之间的关系。不幸的是，配备了常规计算单元（例如CPU/GPU）的现有嵌入式系统无法实时处理大图。取而代之的是，需要大的数据中心执行图形处理，要么由于数据通信而产生额外的延迟和能量，要么仅提供法医（离线）图分析。这项研究旨在通过破坏性的新兴技术有效地启用嵌入式系统中的图形分析。为了支持嵌入式系统中有限的硬件资源的图形分析应用程序，该项目旨在开发Gambit，这是一种基于Memristor的嵌入式计算框架，用于有效的图形处理。我们的研究计划旨在开发多层技术，以实现嵌入式系统（即网络边缘）中高效（例如1000x）和可扩展的实时图分析。它包含跨电路，建筑，系统和垂直整合的研究工作。 （1）在电路级别，该项目提出了一个基于备忘录的图表核心，以实现图形处理的有效计算。 （2）在体系结构级别，该项目提出了针对分区图和各种算法的完整基于Memristor的图形处理体系结构。 （3）在系统级别，该项目为嵌入式系统开发了一个图形分析框架，并将其与流行的嵌入式OS集成在一起。 （4）为集成，该项目提议开发拟议的体系结构和跨层HW/SW/SW共同设计技术的模拟器。该项目通过将来自少数派服务机构的高中生和本科生吸引研究，从而为社会做出贡献，吸引妇女和代表性不足的群体参加研究生教育，从而扩大了计算机工程课程，并在嵌入式系统中使用图形处理和其他出现的应用程序进行了研究，并将研究基础结构用于教育和培训和培训和培训，并与该行业进行了培训。

项目成果

Parallelism in Deep Learning Accelerators

• DOI: 10.1109/asp-dac47756.2020.9045206
• 发表时间: 2020-01
• 期刊: 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC)
• 作者: Linghao Song;Fan Chen;Yiran Chen;H. Li

AccPar: Tensor Partitioning for Heterogeneous Deep Learning Accelerators

• DOI: 10.1109/hpca47549.2020.00036
• 发表时间: 2020-02
• 期刊: 2020 IEEE International Symposium on High Performance Computer Architecture (HPCA)
• 作者: Linghao Song;Fan Chen;Youwei Zhuo;Xuehai Qian;H. Li;Yiran Chen

HyPar: Towards Hybrid Parallelism for Deep Learning Accelerator Array

• DOI: 10.1109/hpca.2019.00027
• 发表时间: 2019-01
• 期刊: 2019 IEEE International Symposium on High Performance Computer Architecture (HPCA)
• 作者: Linghao Song;Jiachen Mao;Youwei Zhuo;Xuehai Qian;Hai Helen Li;Yiran Chen