CSR: Small: Collaborative Research: GAMBIT: Efficient Graph Processing on a Memristor-based Embedded Computing Platform

CSR：小型：协作研究：GAMBIT：基于忆阻器的嵌入式计算平台上的高效图形处理

• 批准号: 1717885
• 负责人: Hai Li
• 金额: $ 10万
• 依托单位: Duke University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-10-01 至 2020-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1717885&HistoricalAwards=false
• 关键词: CSR; Small; Collaborative; Research; GAMBIT

Recently, graph processing received intensive interests in light of a wide range of needs to understand relationships. Graph analytics are widely used in key domains in our society, such as cyber security, social media, infrastructure monitoring (e.g., smart building), natural language processing, system biology, recommendation systems. These important applications all fall into fast-growing sectors in computer science and engineering research. On the other hand, in many emerging applications, the graph analytics are ideally performed in the edge (e.g., a mobile or embedded system) in order to allow the relationships between events to be discovered in the field where they are unfold. Unfortunately, the existing embedded systems equipped with conventional computing units like CPU/GPU cannot efficiently process large graphs in real time. Instead, large data centers are required to perform the graph processing, either incurring extra latency and energy due to data communication or only providing forensic (offline) graph analysis. This research aims to effectively enable graph analytics in embedded system with disruptive emerging technology. To support graph analytic applications with the limited hardware resources in embedded systems, this project seeks to develop GAMBIT -- a memristor-based embedded computing framework for efficient graph processing. Our research program aims to develop multi-layer techniques to enable highly efficient (e.g., 1000X) and scalable real-time graph analytics in embedded systems (i.e., network edge). It contains research efforts across circuit, architecture, system and vertical integration. (1) At the circuit level, the project proposes a memristor-based graph computing core to enable efficient computations for graph processing. (2) At the architecture level, the project proposes the complete memristor-based graph processing architecture for partitioned graph and various algorithms. (3) At the system level, the project develops a graph analytics framework for embedded systems and integrates it with a popular embedded OS. (4) For integration, the project proposes to develop an emulator of the proposed architecture and cross-layer HW/SW co-design techniques. This project contributes to society through engaging high-school and undergraduate students from minority-serving institutions into research, attracting women and under-represented groups into graduate education, expanding the computer engineering curriculum with graph processing and other emerging applications in embedded systems, disseminating research infrastructure for education and training, and collaborating with the industry.

最近，由于理解关系的广泛需求，图处理受到了广泛的关注。图分析广泛应用于我们社会的关键领域，例如网络安全、社交媒体、基础设施监控（例如智能建筑）、自然语言处理、系统生物学、推荐系统。这些重要的应用都属于计算机科学和工程研究中快速增长的领域。另一方面，在许多新兴应用中，图形分析理想地在边缘（例如移动或嵌入式系统）中执行，以便允许在事件展开的领域中发现事件之间的关系。不幸的是，现有的配备CPU/GPU等传统计算单元的嵌入式系统无法有效地实时处理大型图形。相反，需要大型数据中心来执行图形处理，要么因数据通信而产生额外的延迟和能量，要么仅提供取证（离线）图形分析。这项研究旨在利用颠覆性的新兴技术有效地在嵌入式系统中实现图形分析。为了支持嵌入式系统中有限硬件资源的图形分析应用，该项目致力于开发 GAMBIT——一种基于忆阻器的嵌入式计算框架，用于高效图形处理。我们的研究计划旨在开发多层技术，以在嵌入式系统（即网络边缘）中实现高效（例如 1000X）和可扩展的实时图形分析。它包含跨电路、架构、系统和垂直集成的研究工作。 （1）在电路层面，该项目提出了基于忆阻器的图计算核心，以实现图处理的高效计算。 （2）在架构层面，该项目针对分区图和各种算法提出了完整的基于忆阻器的图处理架构。 (3) 在系统层面，该项目开发了嵌入式系统的图形分析框架，并将其与流行的嵌入式操作系统集成。 (4) 为了集成，该项目建议开发一个所提出的架构和跨层硬件/软件协同设计技术的模拟器。该项目通过吸引少数族裔服务机构的高中生和本科生参与研究、吸引女性和代表性不足的群体进入研究生教育、通过图形处理和嵌入式系统中的其他新兴应用扩展计算机工程课程、传播研究成果，为社会做出贡献。教育和培训基础设施以及与行业的合作。

项目成果

Parallelism in Deep Learning Accelerators

• DOI: 10.1109/asp-dac47756.2020.9045206
• 发表时间: 2020-01
• 期刊: 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC)
• 作者: Linghao Song;Fan Chen;Yiran Chen;H. Li

AccPar: Tensor Partitioning for Heterogeneous Deep Learning Accelerators

• DOI: 10.1109/hpca47549.2020.00036
• 发表时间: 2020-02
• 期刊: 2020 IEEE International Symposium on High Performance Computer Architecture (HPCA)
• 作者: Linghao Song;Fan Chen;Youwei Zhuo;Xuehai Qian;H. Li;Yiran Chen

HyPar: Towards Hybrid Parallelism for Deep Learning Accelerator Array

• DOI: 10.1109/hpca.2019.00027
• 发表时间: 2019-01
• 期刊: 2019 IEEE International Symposium on High Performance Computer Architecture (HPCA)
• 作者: Linghao Song;Jiachen Mao;Youwei Zhuo;Xuehai Qian;Hai Helen Li;Yiran Chen