Performance and Reliability Tradeoffs of State of the Art SOI CMOS Devices

最先进的 SOI CMOS 器件的性能和可靠性权衡

• 批准号: 9900464
• 负责人: Dimitrios Ioannou
• 金额: $ 21万
• 依托单位: George Mason University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1999
• 资助国家: 美国
• 起止时间: 1999-05-01 至 2002-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9900464&HistoricalAwards=false
• 关键词: Performance; Reliability; Tradeoffs; State; Art

9900464IoannouThe proposed research integrates five major subtasks, designed to conduct a comprehensive investigation of design tradeoffs between performance and reliability of state of the art n- and p-channeI SOT MOSFET's. Experimental studies will be done on samples provided by Honeywell, Motorola, and Naval Research Laboratory, and simulations with the SILVACO package. Two Ph.D. students will work in this program under the supervision of the P1.(a) The recent discovery and understanding of the opposite channel based injection (OCBI) phenomenon, under our previous NSF grant, places us in a unique position to answer an important remaining question regarding the value of the exponent n, of the interface generation power law Dit(t) = Atn. Specifically, we have established with the help of OCBI that unipolar injection leads to n=O.25 and bipolar to n=0.5. We now propose to examine if this is due to the absence or presence of a coulombic barrier, or it is a result of different electrochemical reactions.(b) Bulk BC PMOSFETs are cheaper to fabricate (single poly) and have better performance, but suffer from DIBL effects and increased hot carrier degradation compared to SC PMOSFETs. We propose to conduct a comparative study of these tradeoffs for S0I PMOSFETs.(c) Narrow channel bulk MOSFETs suffer from higher hot carrier degradation than wide channel ones, but several labs (including ours) have observed that the opposite is true for SOI. We propose to examine why, and suggest suitable process improvements.(d) We propose to conduct an extensive study of the hot carrier reliability of 0.18 and 0.10 micron S0I MOSFETs, bearing in mind that in the case of bulk devices the worst case stress condition as the channel shrinks are reported to be different from the long channel case. (e)The dual-gate S0I MOSFET, where the channel region is independently controlled by self-aligned top and bottom gates, has been singled out in the NTRS report as holding much promise for future scaling down to 10 nm. Because of the structural form of this device, OCBI is expected to be stronger and more complicated than in more conventional S0I structures, with important implications both for reliability and possible device applications. We therefore propose to carry out a comprehensive study of the OCBI phenomenon in the dual-gate SOI MOSFET.***

9900464ioanthouthe提出的研究集成了五个主要子任务，旨在全面研究n-和p-channei sot mosfet的绩效与可靠性之间的设计权衡。实验研究将对霍尼韦尔，摩托罗拉和海军研究实验室提供的样品以及Silvaco包装进行的模拟进行。两位博士学生将在P1的监督下在该计划中工作。（a）根据我们以前的NSF赠款，对相反的基于基于渠道的注射（OCBI）现象的最新发现和理解使我们处于独特的位置，以回答有关指数N的价值的重要剩余问题，即界面发电范围（T）= ATN。具体而言，我们在OCBI的帮助下建立了单极注射导致n = O.25，双极到n = 0.5。现在，我们建议检查这是否是由于库仑屏障的不存在或存在，还是由于不同的电化学反应的结果。（b）批量BC BC PMOSFET的制造价格更便宜（单个Poly），并且具有更好的性能，但与SC PMOSFET相比，DIBL效应和热载体效应增加。我们建议对S0I PMOSFET的这些权衡进行比较研究。（c）狭窄的通道散装MOSFET比宽通道较高的载流子降解较高，但是几个实验室（包括我们的）观察到SOI相反。我们建议检查为什么并提出适当的过程改进。（d）我们建议对0.18和0.10 micron S0I MOSFET的热载体可靠性进行广泛的研究，请记住，在批量设备的情况下，由于据报道，通道收缩与长通道案例不同，因此，由于最坏情况下的压力条件。 （e）双门S0I MOSFET在NTRS报告中已挑出了自我对准的顶部和底部大门的独立控制的通道区域，因为它具有很大的希望，可以将来缩小到10 nm。由于该设备的结构形式，OCBI应比更常规的S0I结构更强大，更复杂，对可靠性和可能的​​设备应用具有重要意义。因此，我们建议对双门SOI MOSFET中的OCBI现象进行全面研究。***