Research on Layout and Logic Design

布局与逻辑设计研究

• 批准号: 9419119
• 负责人: Malgorzata Marek-Sadowska
• 金额: --
• 依托单位: University of California-Santa Barbara
• 依托单位国家: 美国
• 项目类别: Continuing grant
• 财政年份: 1995
• 资助国家: 美国
• 起止时间: 1995-05-01 至 1998-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9419119&HistoricalAwards=false
• 关键词: Research; Layout; Logic; Design

The proposed research is on layout driven synthesis, i.e. the intersection of logic synthesis and physical design. The focus is on restructuring logic networks in synthesized digital systems. Four topics, which meet the goals of improving routing efficiency or power consumption, are being investigated. These are: 1) Incremental logic resynthesis to control wiring, 2) Coupling wiring with logic restructuring and finding optimizations to eliminate wiring overflows. 3) Use of generalized Reed-Muller forms to analyze logic as an aid to: - designing cell libraries and for technology mapping, - developing new multi level optimization techniques, - designing networks of provably good testability. 4) Develop new methods for power optimization, at the technology independent and technology dependent levels in logic synthesis, and also find better routing tools to handle power constraints.

所提出的研究是布局驱动综合，即逻辑综合和物理设计的交叉点。重点是重构综合数字系统中的逻辑网络。正在研究四个主题，以满足提高路由效率或功耗的目标。它们是：1) 增量逻辑再综合来控制布线，2) 将布线与逻辑重构相耦合，并寻找优化以消除布线溢出。 3) 使用广义 Reed-Muller 形式来分析逻辑，以辅助： - 设计单元库和技术映射， - 开发新的多级优化技术， - 设计具有良好可测试性的网络。 4) 在逻辑综合的技术独立和技术依赖层面上开发新的功耗优化方法，并找到更好的布线工具来处理功耗限制。