Research on Layout and Logic Design

布局与逻辑设计研究

• 批准号: 9419119
• 负责人: Malgorzata Marek-Sadowska
• 金额: --
• 依托单位: University of California-Santa Barbara
• 依托单位国家: 美国
• 项目类别: Continuing grant
• 财政年份: 1995
• 资助国家: 美国
• 起止时间: 1995-05-01 至 1998-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9419119&HistoricalAwards=false
• 关键词: Research; Layout; Logic; Design

The proposed research is on layout driven synthesis, i.e. the intersection of logic synthesis and physical design. The focus is on restructuring logic networks in synthesized digital systems. Four topics, which meet the goals of improving routing efficiency or power consumption, are being investigated. These are: 1) Incremental logic resynthesis to control wiring, 2) Coupling wiring with logic restructuring and finding optimizations to eliminate wiring overflows. 3) Use of generalized Reed-Muller forms to analyze logic as an aid to: - designing cell libraries and for technology mapping, - developing new multi level optimization techniques, - designing networks of provably good testability. 4) Develop new methods for power optimization, at the technology independent and technology dependent levels in logic synthesis, and also find better routing tools to handle power constraints.

拟议的研究是关于布局驱动的合成，即逻辑合成与物理设计的交集。重点是重组合成的数字系统中的逻辑网络。正在研究四个符合提高路由效率或功耗的目标的主题。这些是：1）增量逻辑重合以控制接线，2）将接线与逻辑重组耦合并找到优化以消除接线溢出。 3）使用通用的芦苇 - 毛刺表格分析逻辑作为： - 设计单元格库和技术映射， - 开发新的多级优化技术， - 设计具有良好可检验性的网络。 4）在逻辑综合中的技术独立和技术依赖水平上开发新的功率优化方法，并找到更好的路由工具来处理功率约束。