RIA: Frequency to Digital Conversion

RIA：频率到数字转换

• 批准号: 9309656
• 负责人: Ian Galton
• 金额: $ 10万
• 依托单位: University of California-Irvine
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1993
• 资助国家: 美国
• 起止时间: 1993-07-01 至 1997-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9309656&HistoricalAwards=false
• 关键词: RIA; Frequency; Digital; Conversion

Galton This research is evaluating the viability of and will further develop a novel technique for simultaneously performing the previously separate operations of phase-tracking and A/D conversion. The technique gives rise to a family of systems referred to as Sigma-Delta Frequency-to-Digital Converters (SDFDCs), and offers the potential of significant reductions in analog circuit requirements for a variety of applications. Each system uses coarse analog phase measurements, quantization noise shaping, and decimation filtering to perform instantaneous frequency-to-digital conversion. Because they operate on instantaneous frequency in the manner that SD modulators operate on amplitude, they share many of the benefits enjoyed by SD modulator-based A/D converters such as reduced analog circuit requirements and amenability to VLSI implementation. The research is developing rigorous theoretical results supported by simulations with the goal of characterizing SDFDC performance. A VLSI prototype targeted to a specific application will also be developed.

Galton 这项研究正在评估一种新技术的可行性，并将进一步开发一种新技术，用于同时执行先前单独的相位跟踪和 A/D 转换操作。该技术催生了一系列被称为 Σ-Δ 频率数字转换器 (SDFDC) 的系统，并具有显着降低各种应用的模拟电路要求的潜力。每个系统都使用粗模拟相位测量、量化噪声整形和抽取滤波来执行瞬时频率到数字转换。由于它们以 SD 调制器对幅度进行操作的方式对瞬时频率进行操作，因此它们具有基于 SD 调制器的 A/D 转换器所享有的许多优点，例如减少了模拟电路要求以及适合 VLSI 实施。该研究正在开发由模拟支持的严格理论结果，目的是表征 SDFDC 的性能。还将开发针对特定应用的 VLSI 原型。