CIF: Small: Digital Mitigation of Spurious Tones in Fractional-N PLLs

CIF：小：分数 N PLL 中杂散音的数字抑制

• 批准号: 0914748
• 负责人: Ian Galton
• 金额: $ 35.24万
• 依托单位: University of California-San Diego
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2009
• 资助国家: 美国
• 起止时间: 2009-07-01 至 2013-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0914748&HistoricalAwards=false
• 关键词: CIF; Small; Digital; Mitigation; Spurious

CIF: Small: Digital Mitigation of Spurious Tones in Fractional-N PLLsFractional-N phase locked loops (PLLs) are critical components in most modern wireless communication systems including cellular telephones and wireless local area networks. Unfortunately, the error introduced by conventional PLLs contains period disturbances referred to as spurious tones, which only can be suppressed sufficiently for typical wireless applications with techniques that increase power consumption and cost. Furthermore, these techniques become less effective as integrated circuit (IC) technology continues to scale to smaller dimensions. Therefore, the spurious tone problem negatively affects power consumption, cost, and manufacturability of wireless communication systems, and the problem gets worse as IC technology scales with Moore?s Law.The ÄÓ modulator in a conventional PLL is the fundamental cause of spurious tones. The spurious tones are induced when the ÄÓ modulator?s quantization noise is subjected to nonlinearity from non-ideal circuit behavior in the PLL. The goal of this research is to develop a ÄÓ modulator replacement, called a successive requantizer, that avoids this problem. The successive requantizer has a different principle of operation than a ÄÓ modulator and its quantization noise is much less susceptible to nonlinearity-induced spurious tones. The research tasks are 1) to further develop the theory underlying successive requantizers to improve their performance, 2) to investigate how PLLs can be optimized at the circuit level to take advantage of the reduced sensitivity to nonlinear distortion offered by successive requantizers, and 3) to develop a proof-of-concept fractional-N PLL IC enabled by the theoretical results of the project that is compliant with a demanding wireless standard such as IEEE 802.16 and exceeds the present state of the art in terms of minimizing power consumption and circuit area.

CIF：小：分数 N PLL 中杂散音的数字抑制分数 N 锁相环 (PLL) 是大多数现代无线通信系统（包括蜂窝电话和无线局域网）中的关键组件，不幸的是，传统 PLL 引入的误差包含周期。被称为杂散音的干扰，对于典型的无线应用来说只能通过增加功耗和成本的技术来充分抑制。此外，随着集成电路（IC）技术的不断扩展，这些技术变得不那么有效。因此，杂散音问题会对无线通信系统的功耗、成本和可制造性产生负面影响，并且随着 IC 技术随着摩尔定律的扩展，问题会变得更加严重。传统 PLL 中的 Ó 调制器是杂散音的根本原因。当 Δ 调制器的量化噪声受到 PLL 中非理想电路行为的非线性影响时，会产生杂散音调。被称为连续再量化器的 Ó 调制器替代品可以避免这个问题。 连续再量化器的工作原理与 Ó 调制器不同，并且其量化噪声更不容易受到非线性引起的杂散音的影响。 研究任务是 1) 进一步。发展连续再量化器的理论基础，以提高其性能，2) 研究如何在电路级优化 PLL，以利用对非线性失真的降低的敏感性连续的再量化器，以及 3) 开发概念验证的分数 N PLL IC，该 IC 由该项目的理论结果支持，符合 IEEE 802.16 等要求严格的无线标准，并在以下方面超越了当前的技术水平最大限度地减少功耗和电路面积。