CIF: Small: Enabling Dynamic Error Cancellation in High-Resolution RF DACs

CIF：小：在高分辨率 RF DAC 中实现动态误差消除

• 批准号: 1909678
• 负责人: Ian Galton
• 金额: $ 50万
• 依托单位: University of California-San Diego
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2019
• 资助国家: 美国
• 起止时间: 2019-07-15 至 2023-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1909678&HistoricalAwards=false
• 关键词: CIF; Small; Enabling; Dynamic; Error

By 2025, next-generation (5G) mobile communication systems are expected to handle an astonishing 1000-fold increase in data traffic, a 100-fold increase in subscribers, and a several orders of magnitude reduction in energy consumption relative to existing systems. While the potential economic benefits of 5G communication systems are enormous, fully realizing the benefits will require overcoming key technological limitations, most of which relate to operating at far higher maximum frequencies and over far wider bandwidths than existing systems. The multi-decade exponential scaling trend of integrated circuit (IC) technology toward extremely high-density and low-power digital circuitry has enabled powerful digital signal processing (DSP) techniques that will play a large role in overcoming these limitations. Yet no matter how much DSP is applied, the signals to be transmitted are ultimately analog, so analog signal generation, usually via radio frequency digital-to-analog converters (RF DACs), is always required. Unfortunately, RF DACs with high-enough accuracies and bandwidths for next generation communication system infrastructure, such as 5G base stations, are beyond present day capabilities. Solving this problem is the focus of the project, thereby helping realize the full potential of advanced wireless networks.The project will address the problem by developing and experimentally validating a new class of mixed-signal calibration techniques for RF DACs. While prior calibration techniques are widely used to enhance the performance of many critical RF and mixed-signal communication system circuit blocks, such as analog-to-digital converters and frequency synthesizers, they have had limited success to date in improving RF DAC performance. This is because RF DACs are limited by both static and dynamic errors, but prior calibration techniques only address static error. As dynamic error tends to increase with an RF DAC's bandwidth, it presents a fundamental limitation in high-speed communication applications. In contrast, the calibration techniques to be developed under this project adaptively cancel both static and dynamic error. Three related calibration techniques will be developed that together cancel the most significant types of error in RF DACs: those caused by 1) clock skew and component mismatches, 2) inter-symbol interference, and 3) signal-dependent output impedance. The techniques will be validated experimentally via the development of two IC prototypes that target RF DAC performance well beyond the present state-of-the-art. The primary focus of the project is theoretical: the development and optimization of enabling new signal processing techniques and their rigorous mathematical analyses. Nevertheless, the IC development portion of the project is essential in that it will provide feedback to guide the theoretical work and will provide a definitive means of evaluating the project's success.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

到 2025 年，下一代 (5G) 移动通信系统预计将能够处理相对于现有系统增加 1000 倍的数据流量、增加 100 倍的用户数量以及减少几个数量级的能耗。虽然 5G 通信系统的潜在经济效益是巨大的，但要充分实现这些效益，需要克服关键的技术限制，其中大部分与比现有系统高得多的最大频率和更宽的带宽有关。集成电路（IC）技术向极高密度和低功耗数字电路发展的数十年指数扩展趋势使得强大的数字信号处理（DSP）技术成为可能，这些技术将在克服这些限制方面发挥重要作用。然而，无论应用多少 DSP，要传输的信号最终都是模拟信号，因此始终需要通常通过射频数模转换器 (RF DAC) 生成模拟信号。不幸的是，对于下一代通信系统基础设施（例如 5G 基站）而言，具有足够高精度和带宽的 RF DAC 超出了当今的能力。解决这个问题是该项目的重点，从而有助于充分发挥先进无线网络的潜力。该项目将通过开发和实验验证一类新型的 RF DAC 混合信号校准技术来解决该问题。虽然现有的校准技术被广泛用于增强许多关键射频和混合信号通信系统电路模块（例如模数转换器和频率合成器）的性能，但迄今为止，它们在提高射频 DAC 性能方面取得的成功有限。这是因为 RF DAC 受到静态和动态误差的限制，但先前的校准技术仅解决静态误差。由于动态误差往往会随着 RF DAC 带宽的增加而增加，因此它对高速通信应用提出了根本限制。相比之下，该项目下开发的校准技术可以自适应地消除静态和动态误差。我们将开发三种相关的校准技术，共同消除 RF DAC 中最重要的误差类型：由 1) 时钟偏差和组件不匹配、2) 符号间干扰和 3) 信号相关的输出阻抗引起的误差。这些技术将通过开发两个 IC 原型进行实验验证，其目标是 RF DAC 性能远远超出目前最先进的水平。该项目的主要重点是理论：开发和优化新的信号处理技术及其严格的数学分析。然而，该项目的 IC 开发部分至关重要，因为它将提供反馈来指导理论工作，并将提供评估该项目成功的明确方法。该奖项反映了 NSF 的法定使命，并被认为值得通过使用评估来支持基金会的智力价值和更广泛的影响审查标准。

项目成果

Spectral Breathing and Its Mitigation in Digital Fractional-N PLLs

数字小数 N PLL 中的频谱呼吸及其缓解

• DOI: 10.1109/jssc.2021.3074814
• 发表时间: 2021-05
• 期刊: IEEE Journal of Solid-State Circuits
• 影响因子: 5.4
• 作者: Alvarez;Helal, Eslam;Eissa, Amr I.;Galton, Ian
• 通讯作者: Galton, Ian

An ISI Scrambling Technique for Dynamic Element Matching Current-Steering DACs

一种用于动态元件匹配电流引导 DAC 的 ISI 加扰技术

• DOI: 10.1109/jssc.2021.3085587
• 发表时间: 2021-07-15
• 期刊: IEEE Journal of Solid-State Circuits
• 影响因子: 5.4
• 作者: Jason Remple;A. Panigada;I. Galton
• 通讯作者: I. Galton

DTC Linearization via Mismatch-Noise Cancellation for Digital Fractional- N PLLs

通过数字小数 N PLL 失配噪声消除实现 DTC 线性化

• DOI: 10.1109/tcsi.2022.3200047
• 发表时间: 2022-12
• 期刊: IEEE Transactions on Circuits and Systems I: Regular Papers
• 作者: Helal, Eslam;Eissa, Amr I.;Galton, Ian
• 通讯作者: Galton, Ian

MSE Analysis of a Multi-Loop LMS Pseudo-Random Noise Canceler for Mixed-Signal Circuit Calibration

用于混合信号电路校准的多环 LMS 伪随机噪声消除器的 MSE 分析

• DOI: 10.1109/tcsi.2020.2985277
• 发表时间: 2020-05
• 期刊: IEEE Transactions on Circuits and Systems I: Regular Papers
• 作者: Kong, Derui;Galton, Ian
• 通讯作者: Galton, Ian