Design techniques for three-dimensional integrated circuits challenges

应对三维集成电路挑战的设计技术

• 批准号: RGPIN-2017-04292
• 负责人: ElSankary, Kamal
• 金额: $ 1.75万
• 依托单位: Dalhousie University
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2017
• 资助国家: 加拿大
• 起止时间: 2017-01-01 至 2018-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=637185
• 关键词: Design; techniques; three; dimensional; integrated

The ever growing need for more complex integrated circuit (IC) has been driven by the need of complex new products packing more features and requiring faster and lower power processing. Scaling down transistors and using larger dies have been able to keep up with the market demand in the past. However, we are fast approaching the limits of continuous device scaling for planar two-dimensional (2D) IC design. Using 2D integration technologies to implement nowadays complex chips is becoming very expensive and difficult to meet nowadays design challenges.

对更复杂的集成电路 (IC) 的需求不断增长，这是由于对包含更多功能的复杂新产品的需求以及更快、更低功耗的处理的需求推动的。过去，缩小晶体管尺寸和使用更大芯片已经能够满足市场需求。然而，我们正在快速接近平面二维 (2D) IC 设计连续器件缩放的极限。使用 2D 集成技术来实现当今复杂的芯片变得非常昂贵并且难以应对当今的设计挑战。