III-V quantum dot lasers grown on patterned silicon and SOI substrates by MBET first year

MBET 第一年在图案化硅和 SOI 基板上生长 III-V 量子点激光器

• 批准号: 2433499
• 金额: --
• 依托单位: University College London
• 依托单位国家: 英国
• 项目类别: Studentship
• 财政年份: 2020
• 资助国家: 英国
• 起止时间: 2020 至 无数据
• 项目状态: 未结题
• 来源: https://gtr.ukri.org/projects?ref=studentship-2433499
• 关键词: III; quantum; dot; lasers; grown

There is a strong demand for integrating of III-V materials and devices on silicon platform for high-efficient photonics light sources and high mobility electronics devices. However, there are significant challenges for direct epitaxial growth, including anti-phase boundaries (APBs), threading dislocations (TDs) and micro-cracks. In last few years, significant progress has been made in reducing these three types of defects with a few micrometre III-V buffer layers. In addition, the total thickness of III-V layers is limited to a few micrometres (< 6um) by the formation of micro-cracks due to a mismatch in thermal expansion between the III-V epilayers and a Si substrate. In this project, we will exploit the potential of patterned silicon to suppress the defect formation within the patterned area on Si or SOI substrates. Most importantly, we would like to grow nano-size holes within the patterned areas by grow group-IV materials, such as Si and Ge by using twin-MBE system at UCL to relax the strain between III-V layers and silicon substrates, and hence to solve the problem due to thermal expansion mismatch between III-V layers and silicon substrates.

在硅平台上集成III-V材料和设备的需求很大，用于高效的光子光源和高迁移率电子设备。但是，直接外延生长（包括反相边界（APB），螺纹位错（TDS）和微裂缝）面临重大挑战。在过去的几年中，在减少几微米III-V缓冲层的这三种类型的缺陷方面取得了重大进展。另外，由于III-V Epilayers和Si底物之间的热膨胀不匹配，III-V层的总厚度限于几微米（<6UM）。在这个项目中，我们将利用图案硅的潜力抑制Si或SOI基板上图案区域内的缺陷形成。最重要的是，我们希望通过在UCL上使用Twin-MBE系统来放松IIII-V层和硅底物之间的应变，并通过使用Twin-MBE系统在图案中种植纳米大小的孔，例如Si和GE。因此，由于III-V层和硅底物之间的热膨胀不匹配而解决的问题。