Vertical GaN-on-Si membrane power transistors: Efficient power electronics for mass-market applications (VertiGaN)`

垂直硅基氮化镓薄膜功率晶体管：面向大众市场应用的高效电力电子器件 (VertiGaN)`

• 批准号: EP/X014924/1
• 负责人: Matthew Smith
• 金额: $ 41.89万
• 依托单位: University of Bristol
• 依托单位国家: 英国
• 项目类别: Research Grant
• 财政年份: 2024
• 资助国家: 英国
• 起止时间: 2024 至 无数据
• 项目状态: 未结题
• 来源: https://gtr.ukri.org/projects?ref=EP%2FX014924%2F1
• 关键词: Vertical; GaN; Si; membrane; power

This project aims to realize transformative vertical gallium nitride-on-silicon (GaN-on-Si) transistors with breakdown voltage in excess of 1200 V. Power electronics is essential in applications including power distribution and transportation, with inefficiency of power electronic systems estimated to account for 20% of global carbon emissions. Furthermore, emerging low-carbon technologies, including electric vehicles and renewable energy generation, require power electronic devices with significant improvements over existing Si based solutions. GaN is a wide bandgap semiconductor alternative to Si, with superior power electronic material properties. Commercially-available lateral GaN transistors show good power performance, but are generally unsuitable for applications >1000 V due to high on resistance and large chip area. Vertical GaN transistors (where current flows into the plane of the chip, rather than along the surface) offer a step-increase in efficiency and power density over Si-based devices currently dominant in power electronics at voltages exceeding 1000 V. Large-scale commercialisation of vertical GaN devices is currently inhibited by the requirement for expensive and unsustainable GaN bulk substrates. Transfer to sustainable Si substrates as proposed here, with a cost reduction of >1000x, requires management of associated material defects, to be achieved in this work through of implementation of novel device structures and optimisation of material growth processes. Demonstration of vertical GaN on Si transistors with breakdown voltage of >1200 V (i.e. voltage at which device failure occurs), improved from <600 V in previous attempts, will enable exploitation of the outstanding GaN material properties in emerging mass market applications at >1000 V, unlocking new applications and enabling reduced carbon emissions in next-generation power electronic systems including electric vehicles and power distribution. Breakdown voltage in vertical GaN-on-Si transistors will be increased through improvement of material quality in the active device drift region. The novel structure will use an epitaxially-embedded n+GaN drain contact layer to facilitate a drain-recessed membrane device architecture, eliminating low-quality material from the active device region. In parallel, optimisation of epitaxial growth techniques will produce GaN-on-Si material with increased total thickness and a reduction in both dislocation density and background impurity levels. Drain-recessed GaN-on-Si membrane structures will then be integrated with finFET device topologies, shown to withstand operation voltages >1200 V in GaN-on-GaN, resulting in transistors with enhanced off-state blocking and on-state electron transport characteristics. The development workplan, in close collaboration and with strong support by industry, will enable both a thorough exploration of the underlying physics determining vertical breakdown in GaN-on-Si and improvements in device performance toward that required for large-scale commercialisation. Comprehensive failure analysis via reliability/stability testing and multiphysics modelling will provide further understanding of the GaN-on-Si material system and commercial potential.Technology demonstrators will be optimally positioned for integration with next-generation manufacturing chains and testing systems, ensuing maximum commercial impact. This will be achieved through regular consultation with the Project Steering Committee, consisting of UK-based manufacturers of power electronic materials, devices and systems, as well as academics and a prominent UK government policy influencer. The use of a Design Kit to promote the benefits of the technology to system designers and manufacturers will ensure maximum uptake and identification of additional application areas, toward achieving wide-scale use of GaN devices and an associated reduction in carbon emissions from inefficiency of power electronics.

该项目旨在实现击穿电压超过 1200 V 的变革性垂直硅基氮化镓 (GaN-on-Si) 晶体管。电力电子技术在配电和运输等应用中至关重要，预计电力电子系统的低效率将导致占全球碳排放量的20%。此外，新兴的低碳技术，包括电动汽车和可再生能源发电，需要电力电子设备在现有硅基解决方案的基础上进行重大改进。 GaN是Si的宽带隙半导体替代品，具有优越的电力电子材料特性。商用横向 GaN 晶体管显示出良好的功率性能，但由于导通电阻高和芯片面积大，通常不适合 >1000 V 的应用。垂直 GaN 晶体管（电流流入芯片平面，而不是沿着表面）与目前在电压超过 1000 V 的电力电子领域占主导地位的硅基器件相比，效率和功率密度大幅提高。 大规模商业化目前，垂直 GaN 器件的发展受到对昂贵且不可持续的 GaN 体衬底的需求的抑制。这里提出的转移到可持续硅衬底，成本降低>1000倍，需要管理相关的材料缺陷，在这项工作中通过实施新颖的器件结构和优化材料生长工艺来实现。垂直硅基氮化镓晶体管的击穿电压>1200V（即器件发生故障时的电压），从之前的尝试中的<600V有所提高，将能够在>1000V的新兴大众市场应用中利用出色的GaN材料特性V，解锁新应用并减少下一代电力电子系统（包括电动汽车和配电）的碳排放。通过改善有源器件漂移区的材料质量，可以提高垂直硅基氮化镓晶体管的击穿电压。该新颖结构将使用外延嵌入的 n+GaN 漏极接触层来促进漏极凹入式薄膜器件架构，从而消除有源器件区域的低质量材料。与此同时，外延生长技术的优化将生产出总厚度增加、位错密度和背景杂质水平降低的硅基氮化镓材料。然后，漏极凹进式 GaN-on-Si 膜结构将与 finFET 器件拓扑集成，显示 GaN-on-GaN 可以承受 >1200 V 的工作电压，从而使晶体管具有增强的断态阻断和导通态电子传输特性。该开发工作计划在业界的密切合作和大力支持下，将能够对决定硅基氮化镓垂直击穿的基础物理进行彻底探索，并提高器件性能，以达到大规模商业化所需的性能。通过可靠性/稳定性测试和多物理场建模进行的全面故障分析将有助于进一步了解硅基氮化镓材料系统和商业潜力。技术演示器将处于最佳位置，可与下一代制造链和测试系统集成，从而实现最大的商业影响。这将通过与项目指导委员会定期协商来实现，该委员会由英国电力电子材料、设备和系统制造商以及学者和英国政府政策影响者组成。使用设计套件向系统设计人员和制造商宣传该技术的优势，将确保最大限度地吸收和识别其他应用领域，从而实现 GaN 器件的广泛使用，并减少因电力电子效率低下而产生的碳排放。