Vertical GaN-on-Si membrane power transistors: Efficient power electronics for mass-market applications (VertiGaN)`

垂直硅基氮化镓薄膜功率晶体管：面向大众市场应用的高效电力电子器件 (VertiGaN)`

• 批准号: EP/X014924/1
• 负责人: Matthew Smith
• 金额: $ 41.89万
• 依托单位: University of Bristol
• 依托单位国家: 英国
• 项目类别: Research Grant
• 财政年份: 2024
• 资助国家: 英国
• 起止时间: 2024 至 无数据
• 项目状态: 未结题
• 来源: https://gtr.ukri.org/projects?ref=EP%2FX014924%2F1
• 关键词: Vertical; GaN; Si; membrane; power

This project aims to realize transformative vertical gallium nitride-on-silicon (GaN-on-Si) transistors with breakdown voltage in excess of 1200 V. Power electronics is essential in applications including power distribution and transportation, with inefficiency of power electronic systems estimated to account for 20% of global carbon emissions. Furthermore, emerging low-carbon technologies, including electric vehicles and renewable energy generation, require power electronic devices with significant improvements over existing Si based solutions. GaN is a wide bandgap semiconductor alternative to Si, with superior power electronic material properties. Commercially-available lateral GaN transistors show good power performance, but are generally unsuitable for applications >1000 V due to high on resistance and large chip area. Vertical GaN transistors (where current flows into the plane of the chip, rather than along the surface) offer a step-increase in efficiency and power density over Si-based devices currently dominant in power electronics at voltages exceeding 1000 V. Large-scale commercialisation of vertical GaN devices is currently inhibited by the requirement for expensive and unsustainable GaN bulk substrates. Transfer to sustainable Si substrates as proposed here, with a cost reduction of >1000x, requires management of associated material defects, to be achieved in this work through of implementation of novel device structures and optimisation of material growth processes. Demonstration of vertical GaN on Si transistors with breakdown voltage of >1200 V (i.e. voltage at which device failure occurs), improved from <600 V in previous attempts, will enable exploitation of the outstanding GaN material properties in emerging mass market applications at >1000 V, unlocking new applications and enabling reduced carbon emissions in next-generation power electronic systems including electric vehicles and power distribution. Breakdown voltage in vertical GaN-on-Si transistors will be increased through improvement of material quality in the active device drift region. The novel structure will use an epitaxially-embedded n+GaN drain contact layer to facilitate a drain-recessed membrane device architecture, eliminating low-quality material from the active device region. In parallel, optimisation of epitaxial growth techniques will produce GaN-on-Si material with increased total thickness and a reduction in both dislocation density and background impurity levels. Drain-recessed GaN-on-Si membrane structures will then be integrated with finFET device topologies, shown to withstand operation voltages >1200 V in GaN-on-GaN, resulting in transistors with enhanced off-state blocking and on-state electron transport characteristics. The development workplan, in close collaboration and with strong support by industry, will enable both a thorough exploration of the underlying physics determining vertical breakdown in GaN-on-Si and improvements in device performance toward that required for large-scale commercialisation. Comprehensive failure analysis via reliability/stability testing and multiphysics modelling will provide further understanding of the GaN-on-Si material system and commercial potential.Technology demonstrators will be optimally positioned for integration with next-generation manufacturing chains and testing systems, ensuing maximum commercial impact. This will be achieved through regular consultation with the Project Steering Committee, consisting of UK-based manufacturers of power electronic materials, devices and systems, as well as academics and a prominent UK government policy influencer. The use of a Design Kit to promote the benefits of the technology to system designers and manufacturers will ensure maximum uptake and identification of additional application areas, toward achieving wide-scale use of GaN devices and an associated reduction in carbon emissions from inefficiency of power electronics.

该项目的目的是实现具有分解电压超过1200 V的硅硅硅质氮（Gan-On-Si）晶体管的变革性垂直芯片。电力电子对应用程序的应用至关重要，包括电源分配和运输，并且估计占全球碳发射20％的电力电子系统的效率低下。此外，包括电动汽车和可再生能源在内的新兴低碳技术需要电力电子设备，比现有基于SI的解决方案有显着改进。 GAN是SI的宽带隙半导体替代品，具有优质电子材料特性。商业上可用的侧gan晶体管表现出良好的功率性能，但由于电阻较高和较大的芯片区域，通常不适合1000 V的应用。垂直的GAN晶体管（电流流入芯片平面，而不是沿着地面）提供了效率和功率密度的逐步增加，而基于SI的基于SI的设备目前在电源电子设备上占主导地位，电压超过1000 V.目前，垂直GAN设备的大规模商业化受到昂贵的昂贵和不稳定的速度的需求。转移到此处提议的可持续SI基板，成本降低> 1000倍，需要通过实施新型设备结构和材料增长过程的优化来实现相关材料缺陷的管理。 > 1200 V的分解电压（即设备故障发生的电压）在Si晶体管上的垂直gan演示，从以前尝试的尝试中偏离了<600 V，将使在> 1000 V处的新兴大众市场应用中的出色GAN材料属性剥削，将新的应用和发电量释放新的应用和发电量降低了电动电动机，包括电动电动电动机的电动电动机销量，包括碳发电量。通过提高主动装置漂移区域的材料质量，将增加垂直GAN-ON-SI晶体管中的故障电压。新颖的结构将使用外延设置的N+GAN排水接触层来促进漏排水型的膜设备架构，从而消除了活性设备区域的低质量材料。同时，外延生长技术的优化将产生gan-on-si材料，总厚度增加，位错密度和背景杂质水平降低。然后，漏排水不必要的GAN-ON-SI膜结构将与FinFET设备拓扑集成，显示在GAN-GAN中可承受> 1200 V的操作电压，从而导致晶体管具有增强状态和州内部电动电子传输特性的增强。开发工作计划是密切合作的，并在行业得到的强烈支持下，将既可以彻底探索确定GAN-ON-SI垂直分解的基础物理学，以及对大规模商业化所需的设备性能的改进。通过可靠性/稳定性测试和多物理学建模进行的综合故障分析将进一步了解GAN-ON-SI材料系统和商业潜力。技术演示者将最佳地定位，以与下一代制造链和测试系统集成，从而最大程度的商业影响。这将通过与项目指导委员会的定期咨询来实现，该委员会由英国电力材料，设备和系统的制造商以及学者和著名的英国政府政策影响者组成。使用设计套件来促进该技术对系统设计师和制造商的好处，将确保最大程度地吸收和识别其他应用领域，以实现对GAN设备的广泛使用，并导致电力电子效率低下的碳排放量相关。