Electrical Testing of Open Defects in Deep Sub-micron CMOS Logic Circuits

深亚微米 CMOS 逻辑电路中开路缺陷的电气测试

• 批准号: 15500041
• 负责人: HASHIZUME Masaki
• 金额: $ 1.86万
• 依托单位: The University of Tokushima
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Scientific Research (C)
• 财政年份: 2003
• 资助国家: 日本
• 起止时间: 2003 至 2005
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-15500041/
• 关键词: electrical test; CMOS; supply current; open defect; lead open; current test; CMOS論理回路; ピン浮き

CMOS technology is used for implementing logic circuits. Open defects have often occurred in the circuits. However, open defects are hard to be detected with conventional test methods. The purpose of this study is to develop new test methods for detecting open defects in deep sub-micron CMOS ICs and CMOS circuits fabricated on printed circuit boards with such ICs. The following studies have been done in this study.(1)Electrical tests of CMOS logic ICsTwo kinds of high speed IDDQ test methods and the test circuits have been developed. Also, an electrical test method based on dynamic supply current has been proposed. Furthermore, since analog circuits have been implemented in an IC, open defect detection methods and the DFTs have been proposed for the following typical analog circuits ; AGCs, D/A converters and CCDs.(2)Lead open detectionI have proposed an electrical test method to detect lead opens. The test method is based on supply current under AC electric field application. In this study, I have examined what AC electric field is suitable for detecting open leads. Also, I have developed a supply current test method, in which AC signal is provided directly to targeted leads. The proposed methods needs test vector generation process. It has become difficult to generate test vectors. Thus, I have developed two kinds of supply current test methods that do not depend on test vectors.

CMOS技术用于实施逻辑电路。开放式缺陷经常发生在电路中。但是，很难用常规测试方法检测到开放缺陷。这项研究的目的是开发新的测试方法，用于检测具有此类IC的印刷电路板上制造的深度亚微米CMOS IC和CMOS电路中的开放缺陷。 （1）CMOS逻辑ICSTWO的高速IDDQ测试方法和测试电路的电气测试已经开发出来。同样，已经提出了一种基于动态供应电流的电测试方法。此外，由于已经在IC中实现了模拟电路，因此为以下典型的模拟电路提出了开放缺陷检测方法和DFT。 AGC，D/A转换器和CCD。（2）铅开放式检测提出了一种电气测试方法来检测铅打开。该测试方法基于AC电场应用下的电源电流。在这项研究中，我检查了哪种交流电场适合检测开放式导线。另外，我已经开发了一种供应电流测试方法，其中直接向目标导线提供了交流信号。提出的方法需要测试矢量生成过程。生成测试矢量已经变得困难了。因此，我开发了两种不依赖测试向量的电流测试方法。

项目成果

H.Yotsuyanagi: "Test Sequency Generation for Test Time Reduction of IDDQ Testing"IEICE Transaction on Information and Systems. E87-D・3. 537-543 (2004)

H.Yotsuyanagi：“IDDQ 测试测试时间减少的测试序列生成”IEICE E87-D·3 (2004)。

Test Equipment for CMOS Lead Open Detection Based on Supply Current under AC Electronic Field Application

交流电子场应用下基于电源电流的CMOS引线开路检测测试装置

• 发表时间: 2005
• 期刊: Proc.of Electronic Circuits World Convention 10
• 作者: 赤池 大史;山本 久志;会田 雅樹;飯村 清明;T.Hanyu;M.Ichimiya
• 通讯作者: M.Ichimiya

CMOS Open Fault Detection by Appearance Time of Switching Supply Current

通过开关电源电流出现时间检测 CMOS 开路故障

• 发表时间: 2004
• 期刊: Proc. of the second IEEE International Workshop on Electronic Design, Test, and Applications
• 作者: Y.Higami;S.Kajihara;S.Kobayeshi;Y.Takamatsu;M.Hashizume
• 通讯作者: M.Hashizume

M.Takagi: "Testability of Pin Open in Small Outline Package ICs by Supply Current Testing"Proc.of 2003 International Technical Conference on Circuits/Systems, Computers and Communications. 836-839 (2003)

M.Takagi：“通过电源电流测试对小型封装 IC 中引脚开路的可测试性”2003 年电路/系统、计算机和通信国际技术会议的会议记录。

A Supply Current Test Method for Bridging Faults in CMOS Microprocessor Based Circuits

一种桥接 CMOS 微处理器电路故障的电源电流测试方法

• 发表时间: 2003
• 期刊: Journal of Japan Institute of Electronics Packaging Vol.6, No.7
• 作者: Niwat Thepvilojanapong;Yoshito Tobe;Kaoru Sezaki;N.Togawa et al.;M.Hashizume
• 通讯作者: M.Hashizume