INVESTIGATION ON ELECTRONIC CHARACTERISTICS OF SiGe MULTI-QUANTUM WELL CHANNEL MOSFETs ON A SOI SUBSTRATE

SOI 衬底上 SiGe 多量子阱沟道 MOSFET 的电子特性研究

基本信息

批准号：
09450145
负责人：
FUJINAGA Kiyohisa
金额：
$ 5.31万
依托单位：
HOKKAIDO INSTITUTE OF TECHNOLOGY
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B).
财政年份：
1997
资助国家：
日本
起止时间：
1997 至 2000
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-09450145/
关键词：
silicon germanium quantum well transistor SOI MOSFET CVD hole current 電界解効果素子

项目摘要

We had developed a heteroepitaxial chemical vapor deposition apparatus on the basis of ultra-clean technology and grew SiGe quantum wells on a silicon or SOI (Silicon On Insulator) substrate by the apparatus. We verified the physical quality of the wells through TEM, SIMS and photoluminescence measurements and found that the wells were defect-free and the Si/SiGe interfaces were very sharp. The energy levels of the quantum wells agreed with those of the theoretical ones. We grew the 40-nm Si at 550℃ on a SOI substrate (a SIMOX wafer was here used) and fabricated a PMOSFET with the 5.9-nm-thick gate silicon oxide. The I-V characteristics of the device were almost all equal to those for the PMOSFET directly formed on a SIMOX wafer. The results indicated the good precision and accuracy of the epitaxial and device processes. We made SiGe-quantum-well-channel PMOSFETs on a SIMOX wafer (gate Si oxide : 5.9 nm, Si cap layer : 7 nm, Ge fraction of SiGe alloy : 0.2, well width : 13 nm, SOI thickness : 280 nm, Si buffer layer on a SOI wafer : 40 nm). We confirmed the current of holes confined to the SiGe well through the I-V characteristics in the saturation and subthreshold regions. Numerical calculation was carried out for the energy levels and charge densities of heavy holes in single and triple SiGe quantum wells with the Si barrier height of 145 meV.We used 0.266 m_0 as the effective mass of heavy holes in the SiGe layers and 12.6 as the permittivity of the layers. A low hole density below 10^<10> cm^<-3> in the wells was assumed. We clarified the energy levels of the single quantum wells related to the well width and demonstrated the relationship between the energy level or charge density and the Si Barrier width of the triple quantum wells.

我们开发了基于超净技术的异质外延化学气相沉积装置，并通过该装置在硅或SOI（绝缘体上硅）衬底上生长了SiGe量子阱，并通过TEM、SIMS和验证了阱的物理质量。光致发光测量发现，量子阱没有缺陷，并且 Si/SiGe 界面非常清晰。我们生长了 40 nm 的量子阱的能级。在550℃的SOI衬底上（这里使用的是SIMOX晶圆）并用5.9nm厚的栅极氧化硅制作了PMOSFET，该器件的I-V特性几乎与直接在SOI衬底上形成的PMOSFET相同。 SIMOX 晶圆。结果表明我们在 SIMOX 上制造了 SiGe 量子阱沟道 PMOSFET。我们确认了硅晶片（栅极硅氧化物：5.9 nm，Si盖层：7 nm，SiGe合金的Ge分数：0.2，阱宽度：13 nm，SOI厚度：280 nm，SOI晶片上的Si缓冲层：40 nm）。通过饱和区和亚阈值区的I-V特性，对限制在SiGe阱中的空穴电流进行了能级和电荷的数值计算。 SiGe 层中重空穴的有效质量为 0.266 m_0，层的介电常数为 12.6，低于 10 的低空穴密度。假设井中的^<10> cm^<-3> 阐明了与井宽度相关的单量子井的能级，并证明了它们之间的关系。三量子阱的能级或电荷密度和硅势垒宽度。