High yield, low variability – Employing silicon CMOS technology for the realization of spin qubits

高产量、低变异性 – 采用硅 CMOS 技术实现自旋量子位

• 批准号: 421769186
• 负责人: Professor Dr. Joachim Knoch
• 金额: --
• 依托单位: Institut für Halbleitertechnik (IHT)
• 依托单位国家: 德国
• 项目类别: Research Grants
• 财政年份: 2019
• 资助国家: 德国
• 起止时间: 2018-12-31 至 2022-12-31
• 项目状态: 已结题
• 来源: https://gepris.dfg.de/gepris/projekt/421769186?language=en
• 关键词: yield; low; variability; Employing; silicon

In recent years, all building blocks for quantum computation using spin qubits were demonstrated in electrostatically defined spin qubits based on e.g. GaAs or Si. Remaining manipulation infidelities are tolerable by using a surface code which requires a large number of physical qubits. As a result, the feasibility of a spin qubit quantum computer is directly related to the scalability of the system. However, even state-of-the-art qubit realizations rely on a rather immature fabrication technology with very low yield and large device-to-device variability. Furthermore, complex multi-layer gate patterns will be required to improve the confinement potentials and to realize new functionalities e.g. a quantum bus. In the current project a qubit technology will be developed that is based on fabrication techniques derived from industrial silicon CMOS technology ensuring scalability and a high yield of our approach. Due to the low-temperature operation and in order to guarantee tunability of the qubits a very large number of nanoscale gate electrodes will be realized on top of a semiconductor heterostructure in which the single electron spin representing qubits will be defined electrostatically. For the realization of these gate structures we will use the so-called (multiple) spacer process which not only avoids the need for highly sophisticated nanolithography (such as electron-beam lithography). More importantly, it significantly reduces the device-to-device variability. This strongly increases the yield and in addition might even allow a reduction of the total number of gates necessary to electrostatically tune the individual qubits. The fabrication will be carried out with the lowest possible ther-mal budget such that the impact on the heterostructure is minimized (e.g. no reduction of valley splitting in Si/SiGe quantum wells) and that the developed technology can be used for different substrates such as GaAs/AlGaAs.Throughout the project MBE-grown Si/SiGe multi-quantum dot samples will be fabricated. The gate-tunability of the quantum dots, the electrostatic noise and the valley splitting are determined by transport measurements at ~20 mK. Qubit functionality such as charge-readout by an adjacent read-out quantum dot and spin-to-charge conversion will be demonstrated. Within the project we aim at extending the number of quantum dots to 40 without losing tunability and functionality of each quantum dot. The multi-quantum dot samples allow mapping the valley splitting variability over a large area. Combining the development of appropriate fabrication technologies to facilitate groundbreaking work on multi quantum dot/qubit devices our approach has the potential to provide highly relevant contributions to the science and technology of the field. Furthermore, since the technology devel-opment will be as close as possible to current industrial processes it may help accelerating the realization of future quantum information processors.

近年来，使用自旋量子位进行量子计算的所有构建模块都在基于静电定义的自旋量子位中得到了证明。砷化镓或硅。通过使用需要大量物理量子位的表面代码，剩余的操纵不忠是可以容忍的。因此，自旋量子位量子计算机的可行性直接关系到系统的可扩展性。然而，即使是最先进的量子位实现也依赖于相当不成熟的制造技术，其产量非常低，并且器件之间的差异很大。此外，需要复杂的多层栅极图案来提高限制潜力并实现新功能，例如量子总线。 在当前的项目中，将开发一种量子位技术，该技术基于源自工业硅 CMOS 技术的制造技术，确保我们的方法的可扩展性和高产量。由于低温操作并且为了保证量子位的可调谐性，将在半导体异质结构顶部实现大量纳米级栅电极，其中代表量子位的单电子自旋将被静电定义。为了实现这些栅极结构，我们将使用所谓的（多重）间隔工艺，这不仅避免了对高度复杂的纳米光刻（例如电子束光刻）的需要。更重要的是，它显着降低了设备之间的差异。这极大地提高了产量，此外甚至可以减少静电调谐各个量子位所需的门总数。制造将以尽可能低的热预算进行，从而最大限度地减少对异质结构的影响（例如，不会减少 Si/SiGe 量子阱中的谷分裂），并且所开发的技术可用于不同的基板，例如GaAs/AlGaAs。整个项目将制造 MBE 生长的 Si/SiGe 多量子点样品。量子点的栅极可调性、静电噪声和谷分裂由~20 mK 的传输测量确定。将演示量子位功能，例如通过相邻读出量子点进行电荷读出以及自旋到电荷转换。在该项目中，我们的目标是将量子点的数量扩展到 40 个，同时又不损失每个量子点的可调性和功能。多量子点样本允许绘制大面积的谷分裂变异性。结合适当制造技术的开发来促进多量子点/量子位器件的突破性工作，我们的方法有潜力为该领域的科学和技术提供高度相关的贡献。此外，由于技术开发将尽可能接近当前的工业流程，因此可能有助于加速未来量子信息处理器的实现。