SHF: Small: Semi-supervised Learning for Design and Quality Assurance of Integrated Circuits

SHF：小型：集成电路设计和质量保证的半监督学习

• 批准号: 2334380
• 负责人: Peng Li
• 金额: $ 60万
• 依托单位: University of California-Santa Barbara
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2024
• 资助国家: 美国
• 起止时间: 2024-10-01 至 2027-09-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2334380&HistoricalAwards=false
• 关键词: SHF; Small; Semi; supervised; Learning; SHF; Small; Semi; supervised; Learning

Integrated circuits (ICs) have found their way to a plethora of applications such as computing, communication and data processing, instrumentation, control, and transportation. The continuing technology scaling over the past decades has provided plentiful miniaturized devices with unprecedented performance and efficiency at the disposal of the designer. However, implementing ICs using modern technologies is not an easy task. The ever-increasing performance and robustness requirements and technology sophistications have rendered design, verification, and manufacturing complex and costly. This has tremendous impact on two fronts: design productivity and quality assurance, which are the targets of this project. First, there is a pressing need to close the widening design productivity gap due to the increasing circuit and system complexities, and shortage of experienced human designers, specifically for knowledge-intensive custom circuit design. Second, it is desirable to provide quality assurance in lieu of a combination of growing process instabilities and variations and demanding robustness requirements for mission critical applications such as automotive electronics, avionics, and biomedicine. This project will develop innovative machine learning technology to close the productivity gap and address the challenge in quality design in today’s ever-complex IC design and manufacturing setting. The algorithms, circuit models, and design tools resulted from this work will be disseminated in broad communities through publications, workshops, talks, and research collaborations. The lead investigator will actively recruit undergraduate students, including students from underrepresented groups, for research participation and training while partnering with various outreach programs. The project will produce excellent materials to be integrated into undergraduate and graduate level curriculum on integrated circuits and computer aided design powered by modern machine learning technology, thereby providing excellent workforce training opportunities in these areas of importance. Engagement with the US high-tech industry and other research organizations will be sought to broaden the impact of this work, and promote potential technology transfer to the practice.The technical approach of this work centers on semi-supervised learning, which allows for simultaneous use of labeled and unlabeled data for the targeted machine learning applications. While showing promise, semi-surprised learning has yet to be systemically explored in the integrated circuits community. To this end, this work will develop a semi-supervised learning framework to address the key challenge brought by lack of expensive labeled data and domain-specific needs of IC design and quality assurance, broadly applicable to data-efficient circuit optimization, failure and anomaly detection, test, and manufacturing data analysis. The focused domain-specific semi-supervised learning is promising in offering a potentially game-changing solution to the intended circuit applications by leveraging large amounts of cheap unlabeled data and reducing the utilization of expensive labeled data to its minimum. Specifically, this work will provide solutions to data-efficient design optimization and quality assurance under two settings: static and adaptive semi-supervised learning. In the former setting, learning is performed over a provided labeled dataset without additional labeled data query. The latter setting opens up the added dimension of adaptive semi-supervised learning with improved quality of learning and further reduced labeled data use.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

综合电路（IC）已找到了许多应用程序，例如计算，通信和数据处理，仪器，控制和运输。在过去的几十年中，持续的技术扩展为设计师提供了空前的性能和效率，为设计师提供了空前的性能和效率。但是，使用现代技术实施IC并非易事。不断增强的性能和鲁棒性要求和技术社交使设计，验证以及制造业的复杂且昂贵。这对两个方面有巨大的影响：设计生产力和质量保证，这是该项目的目标。首先，由于电路和系统复杂性的增加以及经验丰富的人类设计师的短缺，特别是针对知识密集型的自定义电路设计，因此需要缩小随之扩大的设计生产力差距。其次，希望提供质量保证，以代替不断增长的过程不稳定性，变化以及对任务关键应用（例如汽车电子，航空电子学和生物医学）的鲁棒性要求的结合。该项目将开发创新的机器学习技术，以缩小生产力差距，并在当今持续不断的IC设计和制造环境中应对质量设计的挑战。这项工作产生的算法，电路模型和设计工具将通过出版物，研讨会，演讲和研究合作在广泛的社区中传播。首席调查员将积极招募本科生，包括来自代表性不足的小组的学生，以进行研究参与和培训，同时与各种外展计划合作。该项目将生产出出色的材料，以集成综合电路和计算机辅助设计的本科和研究生水平课程，并由现代机器学习技术提供动力，从而在这些重要性领域提供了出色的劳动力培训机会。将感觉到与美国高科技行业和其他研究组织的参与，以扩大这项工作的影响，并促进潜在的技术转移到实践。这项工作的技术方法集中在半监督的学习上，该学习允许在目标机器学习应用程序中简单地使用标记和未标记的数据。在表现出希望的同时，在综合电路社区中尚未系统地探索半激动的学习。为此，这项工作将开发一个半监督的学习框架，以应对缺乏昂贵的标记数据和特定于IC设计和质量保证的域特异性需求带来的关键挑战，这广泛适用于数据有效的电路优化，故障和异常检测，测试，测试和制造数据分析。通过利用大量廉价的无标记数据并将昂贵的标记数据利用减少到最低限度的最低限度的最低限度的最低限度的最低限度，通过利用大量廉价的无标记数据来为预期的电路应用提供潜在的改变游戏规则的解决方案，可以为预期的电路应用提供潜在的改变游戏规则的解决方案，从而为特定于预期的电路应用程序提供了可能改变游戏规则的解决方案，从而提供了针对性的半监督学习。具体而言，这项工作将在两个设置下为数据有效的设计优化和质量保证提供解决方案：静态和适应性半监督学习。在以前的环境中，学习是通过提供的标记数据集执行的，而没有其他标记的数据查询。后来的设置通过改进的学习质量和进一步降低了标记的数据使用的质量来打开自适应半监督学习的附加维度。该奖项反映了NSF的法定任务，并通过使用基金会的智力优点和更广泛的影响来评估NSF的法定任务。