SHF: EAGER: Toward Energy-Efficient Heterogeneous Computing Integrating Polymorphic Magnetic and CMOS Devices

SHF：EAGER：迈向集成多态磁性和 CMOS 器件的节能异构计算

• 批准号: 1930620
• 负责人: Shaloo Rakheja
• 金额: $ 29.94万
• 依托单位: New York University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2019
• 资助国家: 美国
• 起止时间: 2019-07-01 至 2020-03-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1930620&HistoricalAwards=false
• 关键词: SHF; EAGER; Toward; Energy; Efficient

The integration of non-conventional materials and devices with silicon Complementary Metal Oxide Semiconductor (CMOS) technology can enable a new type of computing platform with potential benefits related to area, energy efficiency, and resiliency. In this regard, storing and manipulating information in magnetic devices is promising. This is because, unlike CMOS devices, information in magnetic devices can be stored without any energy dissipation, while energy is needed only to read or write information. This low-power operation of magnetic devices is highly advantageous for applications such as Internet of Things and intelligent sensing that have low operating power requirements. This research will connect the physics of such magnetic devices with their use in circuits in which magnetic devices co-exist with and complement silicon devices for enhanced functionality and user experience. Results from this research will be incorporated into a hands-on circuit design workshop organized annually at New York University (NYU). Specifically, students will learn about the physics of magnets in table top experiments and interactive online learning tools. The project will also develop content on magnetic memory that will be introduced in a course on nanoelectronics devices and circuits taught annually at NYU. The project will also publicly release the device models and simulation data generated in this research via the science and engineering gateway hosted at Purdue University, known as the nanoHUB, to benefit researchers and educators working in related fields.While other possibilities exist, this particular project will focus on two specific magnetic devices, namely the voltage-controlled topological-spin switch (vTOPSS) and the magneto-electric spin-orbit (MESO) device. These magnetic devices offer 10 to 100 times superior energy efficiency for binary operations compared to their magnetic counterparts. Another unique feature of these devices is that their logic functionality can be configured post-fabrication, which translates into resilience and area- and power benefits at the circuit and system level. Physics-based models of the latency, energy dissipation, thermal stability, and error-rate of vTOPSS and MESO device will be developed and calibrated against large-scale Monte-Carlo simulations. Impact of potential interconnects, including metallic and semiconducting nanowires, on device performance will be quantified. Device-level models will be used to develop a standard cell library of Boolean logic gates with vTOPSS and MESO as the switching elements. The cell library will enable the quantification of performance metrics of magnetic-CMOS computing platform at scale. The physics-to-circuits approach adopted in this research will drive innovative concepts in circuit design that can maximize the competitiveness of the proposed technology.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

非传统材料和器件与硅互补金属氧化物半导体 (CMOS) 技术的集成可以实现新型计算平台，该平台具有与面积、能源效率和弹性相关的潜在优势。在这方面，在磁性设备中存储和操作信息是有前途的。这是因为，与 CMOS 器件不同，磁性器件中的信息可以在没有任何能量耗散的情况下存储，而仅在读取或写入信息时才需要能量。磁性器件的这种低功耗操作对于物联网和智能传感等具有低操作功耗要求的应用非常有利。这项研究将把此类磁性器件的物理原理与其在电路中的使用联系起来，其中磁性器件与硅器件共存并补充，以增强功能和用户体验。这项研究的结果将被纳入每年在纽约大学 (NYU) 举办的实践电路设计研讨会中。具体来说，学生将通过桌面实验和交互式在线学习工具了解磁铁的物理学。该项目还将开发有关磁存储器的内容，这些内容将在纽约大学每年教授的纳米电子器件和电路课程中引入。该项目还将通过普渡大学托管的科学和工程网关（称为 nanoHUB）公开发布本研究中生成的设备模型和模拟数据，以使相关领域的研究人员和教育工作者受益。虽然存在其他可能性，但这个特定项目将重点研究两种特定的磁性器件，即压控拓扑自旋开关（vTOPSS）和磁电自旋轨道（MESO）器件。与磁性设备相比，这些磁性设备的二进制运算能效高出 10 到 100 倍。这些器件的另一个独特功能是它们的逻辑功能可以在制造后配置，这转化为电路和系统级别的弹性以及面积和功耗优势。 vTOPSS 和 MESO 设备的延迟、能量耗散、热稳定性和错误率的基于物理的模型将根据大规模蒙特卡罗模拟进行开发和校准。潜在互连（包括金属和半导体纳米线）对器件性能的影响将被量化。器件级模型将用于开发以 vTOPSS 和 MESO 作为开关元件的布尔逻辑门标准单元库。该单元库将能够大规模量化磁性 CMOS 计算平台的性能指标。这项研究采用的物理到电路方法将推动电路设计中的创新概念，从而最大限度地提高所提出技术的竞争力。该奖项反映了 NSF 的法定使命，并通过使用基金会的智力优势和更广泛的评估进行评估，被认为值得支持。影响审查标准。