CRII: SHF: WINGS -- Wireless Interconnects for Next-Generation Systems
CRII:SHF:WINGS——下一代系统的无线互连
基本信息
- 批准号:1565656
- 负责人:
- 金额:$ 17.5万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2016
- 资助国家:美国
- 起止时间:2016-03-01 至 2020-02-29
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
The development of low-latency, energy-efficient, and reconfigurable on-chip wireless interconnect infrastructure has the potential for reducing the carbon footprint of electronic systems. This research will be integrated with the graduate-level courses on design of VLSI and Nano-electronic devices to be taught by the PI at her institution. The dissemination of open-source software generated in this research via nano-HUB facilities at Purdue University is expected to provide significant impact by serving a broad community of students, researchers, and engineers. Further, the software generated in this research will be used for in-class projects and assignments providing students with a unique opportunity to learn about Exascale computing without abstracting the fundamentals of device physics. Undergraduate students will be advised through the undergraduate summer research program at NYU School of Engineering. Participation of the PI in National Center for Women in Technology program at NYU will facilitate involvement of underrepresented minorities in the research program. The technical objective of this research is to make major advances in the design and optimization of on-chip communications infrastructure by exploiting plasma waves in graphene to implement waveguides and nanoantennas. By marrying disparate technologies - CMOS electronics and graphene plasmonics - a new heterogeneous architecture is proposed to enable terahertz-band communication between several computing elements within a range of 10 cm. The project will develop an analytical model-based benchmarked design space exploration of the interconnect architecture covering implementation aspects (area and energy) and network-level consideration (number of cores and network architecture). Overall, this research will drive connectivity to the full potential of scaled CMOS by improving communication bottleneck in a heterogeneous computing environment.
低延迟、节能和可重新配置的片上无线互连基础设施的开发具有减少电子系统碳足迹的潜力。这项研究将与 PI 在其所在机构教授的超大规模集成电路和纳米电子器件设计研究生课程相结合。本研究中生成的开源软件通过普渡大学的 Nano-HUB 设施进行传播,预计将通过服务广大的学生、研究人员和工程师社区来产生重大影响。此外,本研究生成的软件将用于课堂项目和作业,为学生提供独特的机会来了解百亿亿次计算,而无需抽象设备物理的基础知识。本科生将通过纽约大学工程学院的本科生暑期研究项目获得建议。首席研究员参与纽约大学国家女性技术中心项目将促进代表性不足的少数群体参与研究项目。这项研究的技术目标是通过利用石墨烯中的等离子体波来实现波导和纳米天线,从而在片上通信基础设施的设计和优化方面取得重大进展。通过结合不同的技术(CMOS 电子学和石墨烯等离子体技术),提出了一种新的异构架构,可以在 10 厘米范围内的多个计算元件之间实现太赫兹波段通信。 该项目将开发基于分析模型的互连架构基准设计空间探索,涵盖实施方面(面积和能源)和网络级考虑(核心数量和网络架构)。总体而言,这项研究将通过改善异构计算环境中的通信瓶颈来推动连接性的发展,以充分发挥缩放 CMOS 的潜力。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Shaloo Rakheja其他文献
Shaloo Rakheja的其他文献
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{{ truncateString('Shaloo Rakheja', 18)}}的其他基金
CAREER: A multi-scale and hierarchical computational framework to model III-nitride devices operating in the near-terahertz regime
职业:多尺度和分层计算框架,用于模拟在近太赫兹区域运行的 III 族氮化物器件
- 批准号:
2237663 - 财政年份:2023
- 资助金额:
$ 17.5万 - 项目类别:
Continuing Grant
IUCRC Phase I: University of Illinois at Urbana-Champaign (UIUC): Center for Advanced Semiconductor Chips with Accelerated Performance (ASAP)
IUCRC 第一阶段:伊利诺伊大学厄巴纳-香槟分校 (UIUC):具有加速性能的先进半导体芯片中心 (ASAP)
- 批准号:
2231625 - 财政年份:2023
- 资助金额:
$ 17.5万 - 项目类别:
Continuing Grant
79th Device Research Conference. To Be Held Virtually June 20-23, 2021.
第 79 届设备研究会议。
- 批准号:
2133323 - 财政年份:2021
- 资助金额:
$ 17.5万 - 项目类别:
Standard Grant
IUCRC Planning Grant University of Illinois: Center for Aggressive Scaling by Advanced Processes for Electronics and Photonics (ASAP)
IUCRC 规划拨款伊利诺伊大学:电子和光子学先进工艺积极扩展中心 (ASAP)
- 批准号:
2052749 - 财政年份:2021
- 资助金额:
$ 17.5万 - 项目类别:
Standard Grant
SHF: EAGER: Toward Energy-Efficient Heterogeneous Computing Integrating Polymorphic Magnetic and CMOS Devices
SHF:EAGER:迈向集成多态磁性和 CMOS 器件的节能异构计算
- 批准号:
1930620 - 财政年份:2019
- 资助金额:
$ 17.5万 - 项目类别:
Standard Grant
SHF: EAGER: Toward Energy-Efficient Heterogeneous Computing Integrating Polymorphic Magnetic and CMOS Devices
SHF:EAGER:迈向集成多态磁性和 CMOS 器件的节能异构计算
- 批准号:
2021230 - 财政年份:2019
- 资助金额:
$ 17.5万 - 项目类别:
Standard Grant
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