SHF:Small: Collaborative Research: Exploring 3-Dimensional Integration Strategies of STTRAM

SHF:Small：协作研究：探索 STTRAM 的 3 维集成策略

• 批准号: 1718474
• 负责人: Swaroop Ghosh
• 金额: $ 22.5万
• 依托单位: Pennsylvania State Univ University Park
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-08-01 至 2022-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1718474&HistoricalAwards=false
• 关键词: SHF; Small; Collaborative; Research; Exploring

The development of high-density memory is fueled by recent advancements in several critical areas ranging from big data analytics, Internet-of-Things (IoT), wearable electronics, smart phones, assistive devices, cybersecurity to weather tracking systems. Currently available conventional memory technologies face serious challenges in addressing these needs due to increased energy consumption, scalability limitations, and limited bandwidth. The objective of this proposal is to develop novel memory devices by enabling 3D integration of spin-torque transfer RAM devices (STTRAM) with appropriate selector diodes (SD). These type of memory devices will be massively scalable, energy-efficient, and fast which will open tremendous opportunities to integrate them in existing memory architectures to enable various futuristic applications. The project will integrate education by incorporating research outcomes in PI's academic courses. Industrial feedback will be sought via collaborations. Under-represented groups will be involved in science and engineering through several outreach programs at Penn State University (PSU) and University of Cincinnati (UC) such as Summer Research Opportunities Program (SROP) at PSU, and Emerging Ethnic Engineers (E3) program at UC which provides opportunities to the high-school students from the inner-city schools with economically challenged background to participate in internships and lab-experience activities. Undergraduate students will be involved in research via Research Experiences for Undergraduates (REU) program at both the universities. Dissemination of results will be accomplished by publications in high-impact scientific journals, conference presentations, and YouTube lecture videos. The intellectual merit of the project is in understanding the integration compatibility of STTRAM devices with SD and developing highly scalable 3D crossbar arrays of memory technologies based on integrated STTRAM and SD. The objectives will be achieved by executing the following specific aims: (i) modeling and simulation of STTRAM-SD arrays, (ii) resilience analysis and optimization studies to minimize the impact of device-level variabilities on performance metrics, (iii) optimization of STTRAM-SD architectures for high-performance computing and IoT, (iv) designing, fabrication, testing, and modeling of novel SD devices based on energy band-engineered and doping-engineered transition metal oxide and electrode stacks, (v) designing and fabrication of small-size STTRAM-SD arrays, electrical testing and modeling to benchmark simulations and experimental results. It is anticipated that the successful completion of this project will lead to a fundamental understanding of the compatibility of STTRAM with SD and provide a platform-technology to develop high-density memories which will have transformative impact on commercializing and advancing the futuristic applications.

高密度存储器的发展得益于大数据分析、物联网 (IoT)、可穿戴电子产品、智能手机、辅助设备、网络安全和天气跟踪系统等多个关键领域的最新进展。由于能耗增加、可扩展性限制和带宽有限，当前可用的传统存储器技术在满足这些需求方面面临着严峻的挑战。该提案的目标是通过将自旋转矩转移 RAM 器件 (STTRAM) 与适当的选择器二极管 (SD) 进行 3D 集成来开发新型存储器件。这些类型的存储设备将具有大规模可扩展性、节能性和快速性，这将为将它们集成到现有存储架构中以实现各种未来应用提供巨大的机会。该项目将通过将研究成果纳入 PI 的学术课程来整合教育。将通过合作寻求行业反馈。代表性不足的群体将通过宾夕法尼亚州立大学 (PSU) 和辛辛那提大学 (UC) 的多个外展计划参与科学和工程领域，例如 PSU 的夏季研究机会计划 (SROP) 和宾夕法尼亚州立大学 (PSU) 的新兴种族工程师 (E3) 计划UC为来自市中心学校且经济困难的高中生提供参加实习和实验室体验活动的机会。本科生将通过两所大学的本科生研究经验（REU）项目参与研究。结果的传播将通过在高影响力的科学期刊上发表文章、会议演示和 YouTube 讲座视频来完成。该项目的智力优势在于了解 STTRAM 设备与 SD 的集成兼容性，并开发基于集成 STTRAM 和 SD 的高度可扩展的 3D 存储技术交叉阵列。这些目标将通过执行以下具体目标来实现：(i) STTRAM-SD 阵列的建模和仿真，(ii) 弹性分析和优化研究，以尽量减少设备级变化对性能指标的影响，(iii) 优化用于高性能计算和物联网的 STTRAM-SD 架构，(iv) 基于能带设计和掺杂设计的过渡金属氧化物和电极堆栈的新型 SD 器件的设计、制造、测试和建模，(v) 设计和制造小尺寸的STTRAM-SD 阵列、电气测试和建模，以对模拟和实验结果进行基准测试。预计该项目的成功完成将使人们对 STTRAM 与 SD 的兼容性有一个基本的了解，并提供开发高密度存储器的平台技术，这将对商业化和推进未来应用产生变革性影响。

项目成果

Magnetic Tunnel Junction Reliability Assessment Under Process Variations and Activity Factors and Mitigation Techniques

工艺变化和活动因素下的磁隧道结可靠性评估及缓解技术

• DOI: 10.1166/jolpe.2018.1560
• 发表时间: 2018-06
• 期刊: Journal of Low Power Electronics
• 作者: Iyengar, Anirudh S.;Ghosh, Swaroop;Rathi, Nitin
• 通讯作者: Rathi, Nitin

Reconfigurable and Dense Analog Circuit Design using Two Terminal Resistive Memory

使用两端电阻存储器的可重构和密集模拟电路设计

• DOI: 10.1109/tetc.2019.2938440
• 发表时间: 2019-12
• 期刊: IEEE Transactions on Emerging Topics in Computing
• 影响因子: 5.9
• 作者: Saki, Abdullah Ash;Khan, Mohammad Nasim;Ghosh, Swaroop
• 通讯作者: Ghosh, Swaroop

Test challenges and solutions for emerging non-volatile memories

新兴非易失性存储器的测试挑战和解决方案

• DOI: 10.1109/vts.2018.8368632
• 发表时间: 2018-04
• 期刊: VLSI Test Symposium (VTS
• 作者: Khan, Mohammad Nasim;Ghosh, Swaroop
• 通讯作者: Ghosh, Swaroop

Analysis of Power-Oriented Fault Injection Attacks on Spiking Neural Networks

尖峰神经网络的面向功率的故障注入攻击分析

• DOI: 10.23919/date54114.2022.9774577
• 发表时间: 2022-03
• 期刊: DATE
• 作者: Nagarajan, Karthikeyan;Li, Junde;Ensan, Sina Sayyah;Khan, Mohammad Nasim;Kannan, Sachhidh;Ghosh, Swaroop
• 通讯作者: Ghosh, Swaroop

Test Methodologies and Test-Time Compression for Emerging Non-Volatile Memory

新兴非易失性存储器的测试方法和测试时间压缩

• DOI: 10.1109/tr.2019.2919466
• 发表时间: 2019-11
• 期刊: IEEE Transactions on Reliability
• 影响因子: 5.9
• 作者: Khan, Mohammad Nasim;Ghosh, Swaroop
• 通讯作者: Ghosh, Swaroop