SHF:CSR:Small:Improving Processor Efficiency with Prediction

SHF:CSR:Small：通过预测提高处理器效率

• 批准号: 1216604
• 负责人: Daniel Jimenez
• 金额: $ 35万
• 依托单位: University of Texas at San Antonio
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2012
• 资助国家: 美国
• 起止时间: 2012-08-01 至 2013-04-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1216604&HistoricalAwards=false
• 关键词: SHF; CSR; Small; Improving; Processor

For several decades, computers have been getting faster. Much of this improvement in performance is due to Moore's Law, i.e., the rapid growth in the number of devices that can be integrated into a single microchip. However, techniques that exploit the growing resources provided by Moore's Law are often inefficient and wasteful. This project takes a hard look at techniques used to improve performance, showing how resource-hungry techniques can be made less wasteful. The improved structures use techniques borrowed from other areas of Computer Science to predict the near-term resource usage of the computer to do a better job of allocating those resources. These prediction techniques result in a system that is both more power efficient and better performing.Improvements in power efficiency and performance have a wide-ranging impact, from improving battery life in mobile devices to reducing energy costs and environmental impact of data centers. The project will involve university students in research, helping to train the next generation of technology workers and educators.This project applies microarchitectural prediction techniques to recover wasted resources and thus improve the efficiency of microprocessors. The project explores the following opportunities for reducing waste with prediction: 1) applying highly accurate branch prediction techniques to other domains such as caches, 2) using mixed analog/digital circuit implementations to improve prediction accuracy while reducing waste in the predictor itself, and 3) developing a set of new confidence estimation techniques and considering their use in a variety of microarchitectural optimizations.

几十年来，计算机的速度越来越快。 性能的提高很大程度上归功于摩尔定律，即可以集成到单个微芯片中的器件数量的快速增长。 然而，利用摩尔定律提供的不断增长的资源的技术往往效率低下且浪费。 该项目仔细研究了用于提高性能的技术，展示了如何减少资源匮乏的技术的浪费。 改进的结构使用从计算机科学其他领域借用的技术来预测计算机的近期资源使用情况，以便更好地分配这些资源。 这些预测技术可以使系统更加节能、性能更好。电源效率和性能的提高具有广泛的影响，从延长移动设备的电池寿命到降低数据中心的能源成本和环境影响。该项目将让大学生参与研究，帮助培训下一代技术工作者和教育工作者。该项目应用微架构预测技术来回收浪费的资源，从而提高微处理器的效率。 该项目探索了以下减少预测浪费的机会：1）将高精度分支预测技术应用于缓存等其他领域，2）使用混合模拟/数字电路实现来提高预测精度，同时减少预测器本身的浪费，以及3 ）开发一套新的置信度估计技术并考虑它们在各种微架构优化中的使用。