CSR: Small: Codesign of Accelerator Interface Software and Hardware

CSR：小型：加速器接口软件和硬件的协同设计

• 批准号: 1117280
• 负责人: David Wood
• 金额: $ 40万
• 依托单位: University of Wisconsin-Madison
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2011
• 资助国家: 美国
• 起止时间: 2011-08-15 至 2014-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1117280&HistoricalAwards=false
• 关键词: CSR; Small; Codesign; Accelerator; Interface

Frequent doubling of computer system performance has facilitated innovations in science, education, government, and commerce. The foundations of these improvements, Moore's Law improving density and Dennard scaling reducing transistor power, have enabled chips with exponentially more transistors at roughly fixed power and cost. However, upcoming physical limits threaten to force a choice between either chip power and cost escalation or stagnant chip performance where lowest cost wins.This project seeks a new middle approach, called dark silicon, that keeps the number of powered-on transistors roughly constant even as the number of transistors per chip grows. Rather than add general-purpose cores, future mainstream chips will deploy many accelerators to improve performance or power by 10x-100x. Such chips will turn on one or more accelerators when needed to help power and/or performance and leave most others off. Accelerators for system-on-chip (SoC) have already been designed, for such uses as encryption, (de)compression, network protocols, XML, and graphics. This research seeks to invent and refine architecture and system support to make existing and future accelerators possible in mainstream processors. Specific focus is given to low-overhead solutions facilitating fine-grain use that allow accelerators to be used and shared while protecting security and privacy. The project relies on co-design of hardware and software interfaces to accelerators in order to enable direct, low-latency access from user-mode code via coherent shared-memory communication.More efficient access to accelerators enables Moore's law to bring continued performance increases without corresponding increases in power. This can reduce the overall power consumption of computing and reduce greenhouse gas production, as well as provide greater computation power at any scale, whether in a mobile device or a supercomputer. The PIs continue to impact broadly the state-of-the-art of computer systems through students, courses, talks, industrial affiliates, commercial influence, and sharing of infrastructure.

计算机系统性能的频繁翻倍促进了科学、教育、政府和商业领域的创新。这些改进的基础是摩尔定律提高的密度和登纳德缩放比例降低的晶体管功耗，使得芯片能够以大致固定的功耗和成本拥有指数级数量的晶体管。然而，即将到来的物理限制可能会迫使人们在芯片功耗和成本上升或芯片性能停滞（以最低成本获胜）之间做出选择。该项目寻求一种新的中间方法，称为暗硅，即使在这种情况下，也能保持通电晶体管的数量大致恒定随着每个芯片的晶体管数量的增加。 未来的主流芯片将部署许多加速器，而不是添加通用核心，以将性能或功耗提高10倍至100倍。此类芯片将在需要时打开一个或多个加速器，以帮助提高功率和/或性能，并让大多数其他加速器关闭。 片上系统 (SoC) 的加速器已经设计完成，可用于加密、（解）压缩、网络协议、XML 和图形等用途。 这项研究旨在发明和完善架构和系统支持，以使现有和未来的加速器在主流处理器中成为可能。特别关注促进细粒度使用的低开销解决方案，允许使用和共享加速器，同时保护安全和隐私。该项目依赖于加速器硬件和软件接口的协同设计，以便通过一致的共享内存通信从用户模式代码进行直接、低延迟的访问。更高效地访问加速器使摩尔定律能够带来持续的性能提升，而无需功率相应增加。这可以降低计算的整体功耗并减少温室气体的产生，并在任何规模（无论是在移动设备还是超级计算机中）提供更大的计算能力。 PI 通过学生、课程、演讲、工业附属机构、商业影响力和基础设施共享，继续广泛影响最先进的计算机系统。