CSR: Small: Codesign of Accelerator Interface Software and Hardware

CSR：小型：加速器接口软件和硬件的协同设计

• 批准号: 1117280
• 负责人: David Wood
• 金额: $ 40万
• 依托单位: University of Wisconsin-Madison
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2011
• 资助国家: 美国
• 起止时间: 2011-08-15 至 2014-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1117280&HistoricalAwards=false
• 关键词: CSR; Small; Codesign; Accelerator; Interface; CSR; Small; Codesign; Accelerator; Interface

Frequent doubling of computer system performance has facilitated innovations in science, education, government, and commerce. The foundations of these improvements, Moore's Law improving density and Dennard scaling reducing transistor power, have enabled chips with exponentially more transistors at roughly fixed power and cost. However, upcoming physical limits threaten to force a choice between either chip power and cost escalation or stagnant chip performance where lowest cost wins.This project seeks a new middle approach, called dark silicon, that keeps the number of powered-on transistors roughly constant even as the number of transistors per chip grows. Rather than add general-purpose cores, future mainstream chips will deploy many accelerators to improve performance or power by 10x-100x. Such chips will turn on one or more accelerators when needed to help power and/or performance and leave most others off. Accelerators for system-on-chip (SoC) have already been designed, for such uses as encryption, (de)compression, network protocols, XML, and graphics. This research seeks to invent and refine architecture and system support to make existing and future accelerators possible in mainstream processors. Specific focus is given to low-overhead solutions facilitating fine-grain use that allow accelerators to be used and shared while protecting security and privacy. The project relies on co-design of hardware and software interfaces to accelerators in order to enable direct, low-latency access from user-mode code via coherent shared-memory communication.More efficient access to accelerators enables Moore's law to bring continued performance increases without corresponding increases in power. This can reduce the overall power consumption of computing and reduce greenhouse gas production, as well as provide greater computation power at any scale, whether in a mobile device or a supercomputer. The PIs continue to impact broadly the state-of-the-art of computer systems through students, courses, talks, industrial affiliates, commercial influence, and sharing of infrastructure.

频繁的计算机系统性能加倍促进了科学，教育，政府和商业方面的创新。这些改进的基础，摩尔的法律改善了密度和降低晶体管功率的缩放，使芯片具有指数较高的晶体管，以大致固定的功率和成本。但是，即将到来的物理限制有可能迫使芯片功率和成本升级和停滞的芯片性能之间的选择，而最低成本获胜。该项目寻求一种称为Dark Silicon的新方法，该方法使晶体管的数量保持在晶体管的数量，即使每个芯片生长的晶体管数量也大致稳定。 未来的主流芯片与其添加通用核心，不如将许多加速器部署以提高性能或功率为10x-100x。当需要时，此类芯片将打开一个或多个加速器，以帮助电源和/或性能，并使大多数其他加速器关闭。 已经设计了用于加密，（DE）压缩，网络协议，XML和图形的用途的系统，已设计用于芯片系统的加速器（SOC）。 这项研究旨在发明和完善体系结构和系统支持，以使主流处理器中的现有和将来的加速器成为可能。具体的重点是促进精细颗粒使用的低空解决方案，这些解决方案允许加速器在保护安全和隐私的同时使用和共享加速器。该项目依靠硬件和软件界面的共同设计来加速器，以通过连贯的共享内存通信从用户模式代码启用直接的，低延迟的访问。对加速器的更有效访问使Moore的定律可以持续的性能提高而无需相应的功率增加。这可以减少计算的总体功耗，并减少温室气体的产生，并在任何规模上（无论是在移动设备还是超级计算机中）提供更大的计算能力。 PI继续通过学生，课程，演讲，工业分支机构，商业影响力和基础设施共享的计算机系统的最新影响。