CNS: CSR: Small: Runtime System, Architecture, and Technology Codesign Approach for Heterogeneous Many-Core Processors and Clusters

CNS：CSR：小型：异构众核处理器和集群的运行时系统、架构和技术协同设计方法

• 批准号: 1217102
• 负责人: Nam Sung Kim
• 金额: $ 45万
• 依托单位: University of Wisconsin-Madison
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2012
• 资助国家: 美国
• 起止时间: 2012-09-01 至 2015-11-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1217102&HistoricalAwards=false
• 关键词: CNS; CSR; Small; Runtime; System

The performance of computers has improved tremendously in the past four decades, which has enabled innumerable applications that have major roles in our daily lives. However, without dramatic innovations in improving performance and power efficiency of computing, the continued semiconductor device scaling alone will fail to provide computing capabilities needed for future applications. One of the main performance bottlenecks of traditional computing systems has been the high cost of communications between central processing unit (CPU) and graphics processing unit (GPU). The on-chip integration of CPU and GPU dramatically reduces the cost of communications, but it also worsens power, thermal, and bandwidth issues for chip design. Nonetheless, it also allows new approaches to be explored that previously were not practical. Given the potential and challenges of on-chip integrated CPU+GPU processors, this project undertakes a multidisciplinary effort to improve performance and power efficiency of computers. Specifically, the project aims to (i) develop runtime algorithms for scheduling workload and memory accesses under power, thermal, bandwidth constraints; (ii) explore micoarchitectures for improving memory system performance under bandwidth constraints; and (iii) optimize heterogeneous technology choices for integrated CPU+GPU processors. This project is expected to have significant impact on the technology, circuit, architecture, and runtime system communities, and it is leading to state-of-the-art research infrastructure. The project also contributes state-of-the art workforce training. The outcomes of this project benefit economic growth through technology advances that will provide increased computing capability at a lower cost.

在过去的四十年中，计算机的性能取得了巨大的进步，这使得无数的应用程序在我们的日常生活中发挥着重要作用。然而，如果没有在提高计算性能和能效方面进行重大创新，仅持续的半导体器件扩展将无法提供未来应用所需的计算能力。传统计算系统的主要性能瓶颈之一是中央处理单元（CPU）和图形处理单元（GPU）之间的高通信成本。 CPU 和 GPU 的片上集成极大地降低了通信成本，但也加剧了芯片设计的功耗、散热和带宽问题。 尽管如此，它也允许探索以前不切实际的新方法。 考虑到片上集成 CPU+GPU 处理器的潜力和挑战，该项目采取了多学科的努力来提高计算机的性能和能效。具体来说，该项目旨在 (i) 开发运行时算法，用于在功率、热量、带宽限制下调度工作负载和内存访问； (ii) 探索在带宽限制下提高存储系统性能的微架构； (iii) 优化集成 CPU+GPU 处理器的异构技术选择。该项目预计将对技术、电路、架构和运行时系统社区产生重大影响，并带来最先进的研究基础设施。该项目还提供最先进的劳动力培训。该项目的成果通过技术进步有利于经济增长，这些技术进步将以更低的成本提供增强的计算能力。