SHF:Small:Parallel ILP-Based Global Routing on A Grid of Multi-Cores

SHF:Small：多核网格上基于并行 ILP 的全局路由

• 批准号: 0914981
• 负责人: Azadeh Davoodi
• 金额: $ 19万
• 依托单位: University of Wisconsin-Madison
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2009
• 资助国家: 美国
• 起止时间: 2009-09-01 至 2013-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0914981&HistoricalAwards=false
• 关键词: SHF; Small; Parallel; ILP; Based

Design of today's electronic systems would not be possible without the tools that automate the process of integrating billions of nano-scale components--e.g. into the "brain" of an iPhone. As technology advances towards mobile devices that are smaller yet more powerful, these tools need to evolve as fast as the systems that they help design--in fact faster, because the nano-scale components not only grow in numbers but also shrink in size, bringing along with them new challenges.To improve existing design-aid tools, a new window of opportunity has arisen due to the emergence of a more powerful yet affordable computational platform: a network of multi-core computers working together as if it were one enormous machine. By leveraging this platform the proposed research investigates alternative design automation strategies which traditionally were deemed to be too time-consuming. The focus of the research is to improve an important step of the design process known as global routing, the step in which designers plan how the billions of nano-scale components will be interconnected on the chip. This planning can significantly impact the severity of many issues in subsequent stages of the design cycle, yet it has to be done quickly. With the aid of large-scale parallelism provided by grids, the research aims to demonstrate that the use of a computational technique called integer programming, which was previously viewed as too time-consuming for global routing, can help generate significantly higher quality solutions while meeting practical runtime requirements.Successful completion of the research contributes to faster delivery of electronic products to market with lower design cost, resulting in stronger businesses that can initiate new projects in the technology sector, and hence in the creation of more jobs.

如果没有使数十亿纳米级组件的过程自动化的工具，那么当今电子系统的设计将是不可能的。进入iPhone的“大脑”。随着技术向移动设备越来越强大的移动设备的发展，这些工具需要像它们有助于设计的系统一样快地发展 - 实际上，由于纳米尺度组件不仅会增长数量，而且还缩小了尺寸，并带来新的挑战，带来新的挑战。为了改善现有的设计工具，机遇的一个新窗口既可以在一个更强大的平台上都可以计算出来，即使是一定的计算机，它的计算机上的计算是一定的。巨大的机器。通过利用该平台，拟议的研究调查了替代设计自动化策略，这些策略传统上被认为太耗时了。该研究的重点是改善被称为全球路由的设计过程的重要步骤，设计师计划如何在芯片上互连数十亿个纳米级组件。在设计周期的后续阶段，该计划可能会严重影响许多问题的严重性，但必须迅速完成。在网格提供的大规模平行性的帮助下，该研究旨在证明，使用称为Integer编程的计算技术，以前被视为为全球路线而过时，可以帮助实现更高的运行时需求，从而有助于实现更高的技术成本，从而实现较低的技术成本，从而有助于产生更高的质量解决方案。部门，因此创造了更多的工作。