Research Initiation: Reconfigurable Complex DSP Systolic Arrays

研究启动：可重构复杂 DSP 脉动阵列

• 批准号: 8809811
• 负责人: Magdy Bayoumi
• 金额: $ 5.95万
• 依托单位: University of Louisiana at Lafayette
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 1988
• 资助国家: 美国
• 起止时间: 1988-06-01 至 1990-11-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=8809811&HistoricalAwards=false
• 关键词: Research; Initiation; Reconfigurable; Complex; DSP

The VLSI realization of Digital Signal Processing (DSP) algorithms provides both new opportunities and design challenges. This work attempts to maximize the speed and reliability of such array structures for DSP by employing residue number systems (RNS) and a new fault tolerant mechanism. Several working algorithm specific integrated circuits (ASIC's) are being generated in both NMOS and CMOS technologies.

数字信号处理（DSP）算法的VLSI实现提供了新的机会和设计挑战。 这项工作试图通过采用残基号系统（RN）和新的错误耐受机制来最大化DSP的此类数组结构的速度和可靠性。 NMO和CMOS技术正在生成几种工作算法（ASIC）（ASIC）。