A new low-complexity paradigm for analogue computation and hardware learning

用于模拟计算和硬件学习的新的低复杂度范式

基本信息

  • 批准号:
    EP/V002759/1
  • 负责人:
  • 金额:
    $ 142.79万
  • 依托单位:
  • 依托单位国家:
    英国
  • 项目类别:
    Fellowship
  • 财政年份:
    2021
  • 资助国家:
    英国
  • 起止时间:
    2021 至 无数据
  • 项目状态:
    未结题

项目摘要

The Fellow and his team are seeking to develop a ground-breaking electronic device named the multimodal transistor. Arising from more than a decade of experience in unconventional device design, it allows for entirely new applications such as hardware learning, analog computation and control, while being energy efficient and easy to fabricate.News headlines in electronic devices usually hail developments in nanoscale billion-transistor chips, yet there are major opportunities for innovation in display screen technologies, in which the requirement of fabricating circuits at low cost over large areas, and not ultimate miniaturization, is prevalent. Existing fabrication facilities are now partly being repurposed for emerging large area electronic (LAE) applications: microfluidics, lab-on-a chip, ubiquitous sensors or wearable electronics. LAE usually contain large arrays of relatively simple circuits with few transistors, as areal performance variations impede the fabrication of complex circuits. Incremental progress in LAE is constantly achieved through processes and equipment improvements, and by using new materials with superior properties, both with large capital investment. The Fellow proposes a major step in LAE development, a radical new device design: the multimodal transistor (MMT). The MMT enables new ways of designing electronic circuits for efficient analog operations (amplification, data conversion, analog computation), control and feedback, and ultimately, LAE circuits capable of learning (hardware AI), so far impractical with conventional devices and techniques. Functionality is achieved using energy-efficient circuits of minimal complexity, allowing environmentally friendly fabrication at low cost. By greatly expanding the design possibilities, while being entirely compatible with conventional LAE fabrication, MMT circuits extend the usable lifetime of current manufacturing technologies, maximising the return on investment, and can accelerate the uptake of emerging processes such as 2D semiconductors and spatial atomic layer deposition.The Fellow's team will leverage our long experience in device design and the complementary capabilities of our international partners to design, fabricate and test devices and circuits using vacuum processing and additive manufacturing in conventional and emergent semiconductor systems, supported by state-of-the-art numerical simulation. The team will use their extensive collaborator networks to seed the development of a new electronic design paradigm.As this is an enabling technology, its applications span fields from disposable medical diagnostics and crop monitoring to autonomous vehicle control, new forms user interfaces and immersive entertainment environments, with substantial long term economical and public benefits for the UK and the world. The implications of the novel functionality, such as hardware AI and autonomy, will be a constantly considered. Stakeholders will be involved in shaping the research through cross-disciplinary workshops, online engagement and science festival participation. The focus on people will further include: continuing a decade-long tradition of training, mentoring and involving school students in the Fellow's research; supporting a strong start to the careers of young researchers involved through mentoring, independence and due to the ground-breaking nature of the work; and incorporating the findings into Surrey's teaching curriculum to increase our graduates' employability. The Fellowship will accelerate the Fellow's growth as an international technical and thought leader, while retaining valuable skills, intellectual property and know-how in the UK at a time of global uncertainty. A Fellowship is the optimal funding route, allowing full commitment to advancing this trailblazing design paradigm, within a robust structure and collaborative environment which includes world-leading research facilities and support networks.
该研究员和他的团队正在寻求开发一种名为多模式晶体管的开创性电子设备。它是由十多年来在非常规的设备设计方面的经验引起的,它允许全新应用,例如硬件学习,模拟计算和控制,同时具有节能且易于制造。电子设备的新闻头条通常是在纳米级数十亿美元的纳米级发展中,在纳米级数十亿美元的范围内,在较大的范围内,在整个范围内都没有构造屏幕,而不是在范围内构造屏幕,而不是在范围内进行详细范围。最终的小型化,很普遍。现有的制造设施现在部分用于新兴大面积电子(LAE)应用:微流体,实验室芯片,无处不在的传感器或可穿戴电子设备。 LAE通常包含大量相对简单的电路,晶体管很少,因为Areal性能变化阻碍了复杂电路的制造。通过流程和设备的改进以及使用具有卓越财产的新材料,均以大量资本投资,不断地实现LAE的增量进度。该研究员提出了LAE开发的重要一步,这是一种根本的新设备设计:多模式晶体管(MMT)。 MMT实现了设计电子电路的新方法,以进行有效的模拟操作(放大,数据转换,模拟计算),控制和反馈,最终是能够学习的LAE电路(硬件AI),因此与常规设备和技术有关。使用最小复杂性的节能电路可以实现功能,从而使环境友好的制造成本低。通过大大扩展设计的可能性,同时与常规LAE制造完全兼容,MMT电路扩大了当前制造技术的可用寿命在最新的数值模拟的支持下,使用真空处理和添加剂制造和测试设备和电路,并在常规和紧急的半导体系统中制造和添加剂制造。该团队将使用其广泛的合作者网络来开发新的电子设计范式。这是一种有利的技术,其应用程序涵盖了从一次性医学诊断和作物监控到自动驾驶汽车控制的领域,新形成了用户界面和沉浸式娱乐环境,具有实质性的长期经济和公共福利的英国和世界。新颖功能(例如硬件AI和自主权)的含义将不断考虑。利益相关者将通过跨学科研讨会,在线参与和科学节参与参与研究研究。对人们的关注将进一步包括:延续十年的培训,指导和让学校学生参与该研究员的研究;通过指导,独立性和由于作品的开创性性质,支持参与的年轻研究人员的职业生涯的强劲开端;并将调查结果纳入萨里的教学课程中,以提高我们的毕业生的就业能力。该奖学金将加速该同胞作为国际技术和思想领袖的成长,同时在全球不确定性时期保留英国的宝贵技能,知识产权和知识。奖学金是最佳的资金路线,在强大的结构和协作环境中,允许全面地推进这种开拓性的设计范式,其中包括世界领先的研究设施和支持网络。

项目成果

期刊论文数量(10)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Extraordinarily Weak Temperature Dependence of the Drain Current in Small-Molecule Schottky-Contact-Controlled Transistors through Active-Layer and Contact Interplay
通过有源层和接触相互作用,小分子肖特基接触控制晶体管中漏极电流的温度依赖性极弱
  • DOI:
    10.1002/aelm.202201163
  • 发表时间:
    2022
  • 期刊:
  • 影响因子:
    6.2
  • 作者:
    Bestelink E
  • 通讯作者:
    Bestelink E
High gain complementary inverters based on comparably-sized IGZO and DNTT source-gated transistors
基于同等尺寸 IGZO 和 DNTT 源栅晶体管的高增益互补逆变器
Evidence of Improved Thermal Stability via Nanoscale Contact Engineering in IGZO Source-Gated Thin-Film Transistors
通过 IGZO 源栅薄膜晶体管的纳米级接触工程提高热稳定性的证据
Promoting Low-Voltage Saturation in High-Performance a-InGaZnO Source-Gated Transistors
  • DOI:
    10.1109/ted.2023.3331668
  • 发表时间:
    2023-11-21
  • 期刊:
  • 影响因子:
    3.1
  • 作者:
    Bestelink,Eva;Niang,Kham M.;Sporea,Radu A.
  • 通讯作者:
    Sporea,Radu A.
Compact Unipolar XNOR/XOR Circuit Using Multimodal Thin-Film Transistors
  • DOI:
    10.1109/ted.2021.3103491
  • 发表时间:
    2021-10-01
  • 期刊:
  • 影响因子:
    3.1
  • 作者:
    Bestelink, Eva;de Sagazan, Olivier;Sporea, Radu A.
  • 通讯作者:
    Sporea, Radu A.
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Radu Sporea其他文献

Analytical Models for Delay and Power Analysis of Zero-VGS Load Unipolar Thin-Film Transistor Logic Circuits
零 VGS 负载单极薄膜晶体管逻辑电路的延迟和功耗分析模型
Source-Gated Transistors for Power- and Area-Efficient AMOLED Pixel Circuits
用于高效节能和面积高效的 AMOLED 像素电路的源门晶体管
  • DOI:
    10.1109/jdt.2013.2293181
  • 发表时间:
    2014-11
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Xiaoli Xu;Radu Sporea;Xiaojun Guo
  • 通讯作者:
    Xiaojun Guo

Radu Sporea的其他文献

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{{ truncateString('Radu Sporea', 18)}}的其他基金

Multipurpose Electronics Toolkit using Suspended Membranes: towards Systems on Nothing
使用悬浮膜的多用途电子工具包:走向无源系统
  • 批准号:
    EP/Y000196/1
  • 财政年份:
    2024
  • 资助金额:
    $ 142.79万
  • 项目类别:
    Research Grant
Design for high-yield manufacturing of printed circuits
印刷电路高良率制造设计
  • 批准号:
    EP/R028559/1
  • 财政年份:
    2018
  • 资助金额:
    $ 142.79万
  • 项目类别:
    Research Grant

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