Design for high-yield manufacturing of printed circuits
印刷电路高良率制造设计
基本信息
- 批准号:EP/R028559/1
- 负责人:
- 金额:$ 31.48万
- 依托单位:
- 依托单位国家:英国
- 项目类别:Research Grant
- 财政年份:2018
- 资助国家:英国
- 起止时间:2018 至 无数据
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Emerging printed and flexible electronics have great potential for customised consumer, medical and communication applications. In the lab they show ever-increasing performance as designer materials with specific properties are being developed. For these technologies to bridge the gap to volume production, consistency of performance and high production yield are essential, yet current progress has largely focused on individual device performance. A type of electronic device, the source-gated transistor (SGT), was developed and patented at Surrey and operates on different principles to a conventional thin-film transistor. This device has the potential to produce uniform performance (especially drain current) despite significant parameter variation which may occur during manufacturing. SGTs can be made in a variety of technologies and in principle can be combined with conventional transistors to create high performance printed and large area electronic circuits without resorting to complicated compensation circuitry to repeatedly achieve the desired characteristics. SGTs would be ideal devices for routine operations in mass-market, low-cost printed electronics, in which their energy efficiency and uniformity of performance would outweigh the comparatively low operating speeds.This project would be the first systematic study of both devices and low cost circuits deliberately designed to take advantage of the uniformity benefits of SGTs, with a focus on organic materials. The field of organic transistor research is particularly attractive due to the comparative ease of fabrication, rich palette of designer materials materials - both current and future, flexible substrate compatibility and low capital investment in equipment. This research has, however, now reached a plateau with the development of high-performance semiconductors, where significant improvements are likely to arise chiefly through the synthesis of improved materials. The principal hurdles for high-volume manufacturability are now the comparatively low yield and significant variations in performance, particularly over a large area. We will demonstrate the next important innovation, bringing high-volume yield to the manufacturing of low-power organic electronic technologies, by addressing these challenges.Project partners NeuDrive (materials and devices), Silvaco (simulation), and Altro (smart living spaces) will provide essential know how in order to help achieve the project aims: to verify theoretical SGT properties by device fabrication and characterisation; to optimise the designs and assess the performance of electronic circuit blocks made with source-gated transistors; to support our findings with numerical modelling; to create design guidelines and documentation, facilitating the uptake of this new technology in both the academic and industrial environments.CPI, the national facility for research into advanced manufacturing processes for electronics, will be subcontracted for part of the fabrication, allowing research staff to concentrate on process development, device optimisation and circuit design.We expect the greatest value of the project to be in making possible the efficient high volume manufacturing of a wide variety of printed and flexible electronics used for wearables, sensor arrays and internet-of-things (IoT) devices, which are priorities for development in both the research community and industry. Our contribution will allow consistent performance to be obtained from printed and flexible circuits, directly increasing the market viability of a variety of cost-effective applications.
新兴的印刷和灵活的电子产品具有定制的消费者,医疗和通信应用的巨大潜力。在实验室中,由于正在开发具有特定特性的设计师材料,因此他们显示出不断增强的性能。对于这些技术,要弥合差距到数量的生产,性能和高产量的一致性至关重要,但是目前的进步主要集中在个人设备性能上。在萨里开发和申请了一种电子设备,即源门控晶体管(SGT),并根据常规的薄膜晶体管以不同的原理运行。尽管在制造过程中可能发生了显着的参数变化,但该设备有可能产生均匀的性能(尤其是排水电流)。可以在各种技术中制作SGT,原则上可以与常规晶体管结合使用,以创建高性能印刷和大面积电子电路,而无需诉诸复杂的补偿电路以反复实现所需的特征。 SGT将是大众市场,低成本印刷电子产品进行常规操作的理想设备,在这种设备上,它们的能源效率和性能均匀性将超过相对较低的工作速度。该项目将是对设备的首次系统研究,而低成本电路则是故意利用SGTS统一性的有机物材料的统一效益的,旨在利用有机材料的统一利益。有机晶体管研究领域由于制造的比较易于性,设计器材料的丰富调色板 - 当前和未来,灵活的底物兼容性以及设备的资本投资低,因此特别有吸引力。然而,随着高性能半导体的发展,这项研究已经达到了一个高原,在这种研究中,主要通过改进的材料的综合,可能会大大改善。现在,高量生产性的主要障碍是相对较低的收益率和绩效的显着差异,尤其是在大面积上。我们将通过应对这些挑战来展示下一个重要的创新,从而为低功率有机电子技术的制造带来大量的产量。项目合作伙伴Neudrive(材料和设备),Silvaco(Silvaco(Silvaco)(模拟)和Altro(Altro)(智能生活空间)将为实现Project aimigation the Intagion the Intaility promation y Intection segt promital s sgt promital s sgt promate s sgt sg the sgt,优化设计并评估用源门控晶体管制成的电子电路块的性能;通过数值建模来支持我们的发现;为了创建设计指南和文档,在学术和工业环境中促进这项新技术的吸收。CPI,国家针对电子产品的先进制造过程研究的国家设施,将被分包给一部分制造,使研究人员能够专注于流程开发,设备的优化和电路的最高价值。用于可穿戴设备,传感器阵列和物联网(IoT)设备,这是研究社区和行业发展的优先事项。我们的贡献将允许从印刷和灵活的电路中获得一致的性能,从而直接提高各种具有成本效益的应用的市场可行性。
项目成果
期刊论文数量(10)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
31-1: Invited Paper: The Multimodal Thin-Film Transistor (MMT): A Versatile Low-Power and High-Gain Device with Inherent Linear Response
31-1:特邀论文:多模态薄膜晶体管(MMT):具有固有线性响应的多功能低功耗高增益器件
- DOI:10.1002/sdtp.13900
- 发表时间:2020
- 期刊:
- 影响因子:0
- 作者:Bestelink E
- 通讯作者:Bestelink E
Extraordinarily Weak Temperature Dependence of the Drain Current in Small-Molecule Schottky-Contact-Controlled Transistors through Active-Layer and Contact Interplay
通过有源层和接触相互作用,小分子肖特基接触控制晶体管中漏极电流的温度依赖性极弱
- DOI:10.1002/aelm.202201163
- 发表时间:2022
- 期刊:
- 影响因子:6.2
- 作者:Bestelink E
- 通讯作者:Bestelink E
Progress of Pb-Sn Mixed Perovskites for Photovoltaics: A Review
- DOI:10.1002/eem2.12211
- 发表时间:2021-09-08
- 期刊:
- 影响因子:15
- 作者:Bandara, Rajapakshe Mudiyanselage Indrachapa;Silva, Shashini M.;Silva, S. Ravi P.
- 通讯作者:Silva, S. Ravi P.
Versatile Thin-Film Transistor with Independent Control of Charge Injection and Transport for Mixed Signal and Analog Computation
- DOI:10.1002/aisy.202000199
- 发表时间:2021-01-01
- 期刊:
- 影响因子:7.4
- 作者:Bestelink, Eva;de Sagazan, Olivier;Sporea, Radu A.
- 通讯作者:Sporea, Radu A.
The Secret Ingredient for Exceptional Contact-Controlled Transistors
- DOI:10.1002/aelm.202101101
- 发表时间:2021-12-15
- 期刊:
- 影响因子:6.2
- 作者:Bestelink, Eva;Zschieschang, Ute;Sporea, Radu A.
- 通讯作者:Sporea, Radu A.
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Radu Sporea其他文献
Analytical Models for Delay and Power Analysis of Zero-VGS Load Unipolar Thin-Film Transistor Logic Circuits
零 VGS 负载单极薄膜晶体管逻辑电路的延迟和功耗分析模型
- DOI:
- 发表时间:
2014 - 期刊:
- 影响因子:3.1
- 作者:
Qingyu Cui;Radu Sporea;Wenjiang Liu;Xiaojun Guo - 通讯作者:
Xiaojun Guo
Source-Gated Transistors for Power- and Area-Efficient AMOLED Pixel Circuits
用于高效节能和面积高效的 AMOLED 像素电路的源门晶体管
- DOI:
10.1109/jdt.2013.2293181 - 发表时间:
2014-11 - 期刊:
- 影响因子:0
- 作者:
Xiaoli Xu;Radu Sporea;Xiaojun Guo - 通讯作者:
Xiaojun Guo
Radu Sporea的其他文献
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{{ truncateString('Radu Sporea', 18)}}的其他基金
Multipurpose Electronics Toolkit using Suspended Membranes: towards Systems on Nothing
使用悬浮膜的多用途电子工具包:走向无源系统
- 批准号:
EP/Y000196/1 - 财政年份:2024
- 资助金额:
$ 31.48万 - 项目类别:
Research Grant
A new low-complexity paradigm for analogue computation and hardware learning
用于模拟计算和硬件学习的新的低复杂度范式
- 批准号:
EP/V002759/1 - 财政年份:2021
- 资助金额:
$ 31.48万 - 项目类别:
Fellowship
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