CAREER: Design and Synthesis of Energy-efficient Time-domain Computing for Intelligent Edge Processing

职业：智能边缘处理的节能时域计算的设计和综合

• 批准号: 1846424
• 负责人: Jie Gu
• 金额: $ 100万
• 依托单位: Northwestern University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2019
• 资助国家: 美国
• 起止时间: 2019-05-01 至 2025-04-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1846424&HistoricalAwards=false
• 关键词: CAREER; Design; Synthesis; Energy; efficient

The rapid growth in Internet-of-Things (IoT) and Artificial Intelligence (AI) is creating a huge demand for intelligent electronic devices with very low cost and high energy efficiency. Conventional digital technology is faced with computing bottleneck due to the difficulty of further technology scaling. As a result, new computing methods are urgently needed to meet the demand from the machine learning empowered applications. This project explores a non-conventional time-domain computing technique with promise of bringing fundamental improvement to the energy efficiency of computing. The project can potentially bring significant advancement to the IoT/AI developments by enabling expensive machine learning operations in small IoT devices or sensor nodes. This project will also create significant outreach activities to the society by disseminating the study of energy efficient edge processing to K-12 students and underrepresented groups through a combination of workshops and training programs. New course materials and hand-on experiments will be introduced to undergraduate and graduate students to promote a cross-layer learning strategy from algorithm to hardware design for computer engineering. This project aims at developing a systematic design approach for the emerging time-domain computing which utilizes time for information processing. The proposed developments cover a range of techniques including circuit design, electronic design automation, implementation of machine learning algorithms and integration for near-sensor computing. Specifically, the project will be dedicated to: (1) developing a thorough design principles of the time-domain computing, (2) developing a design automation methodology that is compatible with modern commercial tools and capable of large-scale implementation of the techniques, (3) exploring its strong benefits in machine learning and other popular computing algorithms, and (4) performing system integration with sensor nodes for intelligent edge processing devices. The project will deliver a highly automated systematic design methodology enabling large-scale integration and enhanced energy-efficiency for new time-domain computing techniques.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

Things Internet（IoT）和人工智能（AI）的迅速增长正在对具有非常低成本和高能效率的智能电子设备产生巨大的需求。 传统的数字技术由于难以进一步的技术扩展而面临计算瓶颈。 结果，迫切需要新的计算方法来满足机器学习授权应用程序的需求。 该项目探讨了一种非规定的时间域计算技术，并有望将计算能源效率的基本提高带来。 该项目可以通过在小物联网设备或传感器节点中实现昂贵的机器学习操作来带来重大进步。该项目还将通过通过研讨会和培训计划的结合将能源有效的优势处理的研究传播给K-12学生和代表性不足的团体，从而为社会创造重要的外展活动。 将向本科和研究生介绍新的课程材料和手工实验，以促进从算法到计算机工程硬件设计的跨层学习策略。 该项目旨在为新兴的时间域计算开发系统的设计方法，该计算利用时间进行信息处理。 拟议的开发涵盖了一系列技术，包括电路设计，电子设计自动化，机器学习算法的实现以及用于近传感器计算的集成。 具体而言，该项目将致力于：（1）制定时间域计算的详尽设计原理，（2）开发一种与现代商业工具兼容的设计自动化方法，并且能够大规模实施技术，（3）探索其在机器学习方面的强大好处，并在机器学习方面进行了高级计算和其他流行的计算算法的工具，并（4）与传感器进行了整合。该项目将提供高度自动化的系统设计方法，从而实现大规模整合并增强了新的时间域计算技术的能源效率。该奖项反映了NSF的法定任务，并被认为是值得通过基金会的智力优点和更广泛影响的评估标准通过评估来进行评估的。

项目成果

A Mixed-Signal Time-Domain Generative Adversarial Network Accelerator with Efficient Subthreshold Time Multiplier and Mixed-Signal On-Chip Training for Low Power Edge Devices

混合信号时域生成对抗网络加速器，具有高效的亚阈值时间乘数和低功耗边缘设备的混合信号片上训练

• DOI: 10.1109/vlsicircuits18222.2020.9162829
• 发表时间: 2020
• 期刊: Symposium on VLSI Circuits
• 作者: Chen, Zhengyu;Fu, Sihua;Cao, Qiankai;Gu, Jie
• 通讯作者: Gu, Jie

A Sparse Convolution Neural Network Accelerator for 3D/4D Point-Cloud Image Recognition on Low Power Mobile Device with Hopping-Index Rule Book for Efficient Coordinate Management

用于低功耗移动设备上的 3D/4D 点云图像识别的稀疏卷积神经网络加速器，具有用于高效坐标管理的跳跃索引规则手册

• DOI: 10.1109/vlsitechnologyandcir46769.2022.9830178
• 发表时间: 2022
• 期刊: Symposium on VLSI Technology and Circuits
• 作者: Cao, Qiankai;Gu, Jie
• 通讯作者: Gu, Jie

High-Throughput Dynamic Time Warping Accelerator for Time-Series Classification With Pipelined Mixed-Signal Time-Domain Computing

• DOI: 10.1109/jssc.2020.3021066
• 发表时间: 2021-02-01
• 期刊: IEEE JOURNAL OF SOLID-STATE CIRCUITS
• 影响因子: 5.4
• 作者: Chen, Zhengyu;Gu, Jie
• 通讯作者: Gu, Jie

Digital Compatible Synthesis, Placement and Implementation of Mixed-Signal Time-Domain Computing

• DOI: 10.1145/3316781.3317800
• 发表时间: 2019-06
• 期刊: 2019 56th ACM/IEEE Design Automation Conference (DAC)
• 作者: Zhengyu Chen;H. Zhou;Jie Gu