SHF: Small: Greybox Computing: An Associative Computing Methodology with Instruction Directed Power and Clock Management

SHF：小型：灰盒计算：具有指令导向电源和时钟管理的关联计算方法

• 批准号: 1618065
• 负责人: Jie Gu
• 金额: $ 45万
• 依托单位: Northwestern University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2016
• 资助国家: 美国
• 起止时间: 2016-07-01 至 2021-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1618065&HistoricalAwards=false
• 关键词: SHF; Small; Greybox; Computing; Associative

Energy consumption has become the bottleneck for many emerging applications such as wearable electronics and biomedical devices. The conventional low power design methodology has reached its limitation, bounded by the fundamental tradeoff of performance and power. Given that hardware design and software development are conventionally performed separately and treat each other as blackboxes, this project aims at creating a "greybox" methodology where the information from hardware design of a microprocessor are visible to the higher level software compilers and vice versa. The additional information from different layers of the design space can be used to establish a real-time power optimization technique based on advanced power and clock management circuitry developed in recent years. By breaking the boundary of the traditional design space, it is possible to achieve significant energy savings that are beyond the reach of conventional schemes. The "greybox computing" methodology proposed in this project can overcome the limitations of existing low power technology and provide a new design paradigm based on joint hardware and software optimization. The proposed project will yield several key enabling techniques to achieve ultra-energy saving including (1) a comprehensive associative mapping between software instruction and hardware performance, (2) high efficient power and clock management circuitry design, (3) hardware and software collaborative calibration scheme. This project seeks to develop a new paradigm for low-power system design that would have profound positive impact in a wide range of applications that rely on battery powered or energy scavenging electronics. The project promotes an interdisciplinary collaborative design methodology that could create strong impact on the development flow of current computer design. The project also includes plans for integrating research with education through graduate student training, course development and workshop organization. Outreach activities inspired by this project will encourage underrepresented students to pursue graduate studies.

对于许多新兴应用，例如可穿戴电子和生物医学设备，能源消耗已成为瓶颈。 传统的低功率设计方法已经达到了局限性，并受到性能和权力的基本权衡。 鉴于硬件设计和软件开发通常是单独执行的，并将彼此视为黑盒，因此该项目旨在创建一种“灰色”方法，其中微处理器的硬件设计中的信息可与更高级别的软件编译器可见，反之亦然。 设计空间不同层的其他信息可用于建立基于近年来开发的高级功率和时钟管理电路的实时功率优化技术。 通过打破传统设计空间的边界，可以实现超出传统方案无法实现的大量节能。 该项目中提出的“灰色计算”方法可以克服现有的低功率技术的局限性，并根据联合硬件和软件优化提供新的设计范式。 拟议的项目将产生几种关键的促成技术，以实现超能源节省，包括（1）软件说明和硬件性能之间的全面关联映射，（2）高效的功率和时钟管理电路设计，（3）硬件和软件协作校准方案。该项目旨在为低功率系统设计开发新的范式，该范式将在依赖电池供电或能源清除电子产品的广泛应用中产生深远的积极影响。 该项目促进了一种跨学科的协作设计方法，该方法可能会对当前计算机设计的开发流产生强大的影响。 该项目还包括通过研究生培训，课程开发和研讨会组织将研究与教育整合的计划。 受这个项目启发的外展活动将鼓励代表性不足的学生继续学习研究生学习。

项目成果

Compiler-guided instruction-level clock scheduling for timing speculative processors

用于定时推测处理器的编译器引导指令级时钟调度

• DOI: 10.1145/3195970.3196013
• 发表时间: 2018
• 期刊: Design Automation Conference
• 作者: Fan, Yuanbo;Jia, Tianyu;Gu, Jie;Campanoni, Simone;Joseph, Russ
• 通讯作者: Joseph, Russ

A 0.3–0.86V fully integrated buck regulator with 2GHz resonant switching for ultra-low power applications

具有 2GHz 谐振开关功能的 0.3–0.86V 全集成降压稳压器，适用于超低功耗应用

• DOI: 10.23919/vlsic.2017.8008485
• 发表时间: 2017
• 期刊: Symposium on VLSI Circuits
• 作者: Jia, Tianyu;Gu, Jie
• 通讯作者: Gu, Jie

A Fully Integrated Buck Regulator With 2-GHz Resonant Switching for Low-Power Applications

适用于低功耗应用的具有 2GHz 谐振开关的完全集成降压稳压器

• DOI: 10.1109/jssc.2018.2840513
• 发表时间: 2018
• 期刊: IEEE Journal of Solid-State Circuits
• 影响因子: 5.4
• 作者: Jia, Tianyu;Gu, Jie
• 通讯作者: Gu, Jie

A Fully-integrated LC-Oscillator Based Buck Regulator with Autonomous Resonant Switching for Low-Power Applications

基于全集成 LC 振荡器的降压稳压器，具有适用于低功耗应用的自主谐振开关

• DOI: 10.1109/asscc.2018.8579285
• 发表时间: 2018
• 期刊: Asian Solid-State Circuit Conference
• 作者: Jia, Tianyu;Gu, Jie
• 通讯作者: Gu, Jie

D2M: DATA-DRIVEN MODEL FOR FAST AND ACCURATE TIMING ERROR SIMULATION IN STATICALLY SCHEDULED MICROPROCESSORS

D2M：数据驱动模型，用于静态调度微处理器中快速准确的时序误差仿真

• 发表时间: 2017
• 期刊: Summer Computer Simulation Conference
• 作者: Yuanbo Fan, Russ Joseph