SHF: Small: Enhancing Power, Performance, and Resource Efficiency of Many-core NoCs

SHF：小型：增强多核 NoC 的功耗、性能和资源效率

• 批准号: 1321131
• 负责人: Timothy Pinkston
• 金额: $ 50万
• 依托单位: University of Southern California
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2013
• 资助国家: 美国
• 起止时间: 2013-07-01 至 2018-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1321131&HistoricalAwards=false
• 关键词: SHF; Small; Enhancing; Power; Performance

Continued advancement of computing is of critical importance given the ubiquitous use of computing systems in various forms across a growing landscape-from implantable and wearable biomedical devices to facilitate personalized healthcare; to embedded and smart-sensor devices to facilitate efficient transportation and civil infrastructure; to cloud servers to facilitate data collection, mining, modeling and discovery; to many other scientific, economic, and social computing applications touching numerous disciplines and sectors. Unrelenting progress in semiconductor technologies and continual emergence of new application areas spur unprecedented development of many-core chip multiprocessors (CMPs) to satisfy increasing performance expectations and tightening power and resource constraints of future systems. Along with this parallel processing paradigm comes many challenges for efficiently interconnecting tens to hundreds of cores on a chip and possibly many thousands of chips in stand-alone or distributed systems. To meet the challenges, on-chip network (or NoC) communication architectures must be developed that provide scalable performance while both requiring minimal resources and consuming ultra-low power. This research investigates cross-cutting approaches and techniques to enhance on-chip network power, performance, and resource efficiency in CMP systems. Architecture-level support is explored for effectively exploiting circuit-level power-gating techniques. The objective is to maximize static power savings and minimize performance penalty of the NoC while conserving overall system dynamic power and energy expenditure when applying the techniques. Innovative approaches for minimizing NoC resources and enabling flexibility in resource utilization are also explored. The objective is to improve NoC resource efficiency while balancing system-level tradeoffs. The research plan establishes a systematic, comprehensive, and empirically-based method of investigating efficient communication architectures for many-core CMP systems, soundly grounded by theoretical support, that will lead to the design of promising new approaches and techniques. Beyond its contribution to fundamental advancements in computing, this research has broader potential impact to society through its outreach activities to broaden participation in computing and workforce development of persons from diverse backgrounds.

鉴于在不断增长的植入式植入式和可穿戴生物医学设备中以各种形式使用各种形式的计算系统以促进个性化的医疗保健，因此计算的持续进步至关重要。嵌入和智能传感器设备，以促进有效的运输和民用基础设施；云服务器以促进数据收集，采矿，建模和发现；对于许多其他科学，经济和社会计算应用程序，触及许多学科和部门的应用程序。半导体技术和新应用领域的持续出现在多核芯片多处理器（CMPS）的发展中，不懈的进步，以满足不断提高的性能期望，并收紧未来系统的功率和资源限制。随着这种并行处理范式，在有效地将数十枚核心与数百个芯片相互连接的挑战带来了许多挑战，可能是在独立或分布式系统中的数千个芯片，甚至可能成千上万的芯片。为了应对挑战，必须开发片上网络（或NOC）通信体系结构，以提供可扩展性能的同时，同时需要最少的资源和消耗超低功率。这项研究研究了CMP系统中提高芯片网络能力，性能和资源效率的跨切割方法和技术。探索了建筑级别的支持，以有效利用电路级的电源门控技术。目的是最大程度地利用静态功率节省，并最大程度地减少NOC的性能罚款，同时在应用技术时保护整体系统动力和能量消耗。 还探索了最小化NOC资源并在资源利用中灵活性的创新方法。目的是提高NOC资源效率，同时平衡系统级别的权衡。 该研究计划建立了一种系统的，基于经验的系统，用于研究多核CMP系统的有效通信体系结构的方法，并以理论支持为基础，这将导致设计有希望的新方法和技术。除了其对计算方面的基本进步的贡献外，这项研究还通过其外展活动对社会产生更大的潜在影响，以扩大来自不同背景的人的计算和劳动力发展的参与。