SBIR Phase I: Self-Compensating Ultra-Wideband Direct Digital-to-RF D/A Converter

SBIR 第一阶段：自补偿超宽带直接数字至射频 D/A 转换器

• 批准号: 1143344
• 负责人: Oren Eliezer
• 金额: $ 15万
• 依托单位: XW, LLC
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2012
• 资助国家: 美国
• 起止时间: 2012-01-01 至 2012-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1143344&HistoricalAwards=false
• 关键词: SBIR; Phase; Self; Compensating; Ultra

This Small Business Innovation Research Phase I project attempts to overcome fundamental limitations that are currently inhibiting the realization of much needed low-cost high-performance digital-to-analog converters (DACs), which can accommodate the wide bandwidths of current and future communication systems, software-defined-radios (SDR), and a wide range of other applications. The focus of this research is the development of circuitry and signal processing and control algorithms that would effectively address impairments experienced in a complementary-metal-oxide-semiconductor (CMOS) implementation of a novel DAC topology designed to accommodate ultra-wide bandwidths. While the CMOS fabrication process may be tailored for digital processors and memory, it is a most challenging environment for the design of high-performance, wide dynamic range analog circuitry. The solutions being developed essentially provide the DAC with ?self-healing? capabilities that allow it to overcome inevitable impairments such as device mismatches, non-linearities, and timing misalignments. Preliminary results indicate the validity of the proposed architectures and approaches and it is anticipated that a fabrication-ready design will result from the Phase 1 research.The involvement of researchers and PhD candidates from academia in this research allows them exposure into most challenging research topics that are of great interest to the semiconductor industry. The broader impact/commercial potential of this project is in allowing ultra-high-performance data-conversion capabilities to be integrated into low-cost CMOS system-on-chip (SoC) solutions that are widely used in commercial applications of various types ranging from communications and multimedia to instrumentation. In particular, the technology being developed will allow for the integration and low-cost realization of this most critical function in a true SDR. The proposed innovation, targeting the self-sufficient-compensation for the effects of inevitable impairments, such as fabrication-process variations, mismatches, non-linearities, and timing misalignments, through the employment of novel built-in calibration and compensation circuitry and algorithms, will allow integrated DACs to deliver ultra-high performance (e.g., 16-bit resolution at rates above 10GHz) without requiring costly testing at fabrication, production-yield losses, laser trimming, or any other consequence of traditional design and manufacturing of high-performance analog integrated circuits. The approach to be developed has a broader impact on chip manufacturing, as these impairments represent limiting factors in other functions as well. As an enabling technology, the proposed innovation can potentially greatly increase the size of the existing market for data converters, currently at $3B, and allow for various new consumer applications where wide bandwidths of operation are needed and cost is a constraint.

这项小型企业创新研究阶段I项目试图克服基本的限制，这些限制目前正在抑制急需的低成本高成本的高成本数字到Analog转换器（DACS），这些数字转换器（DACS）可以容纳当前和未来的通信系统，软件定义的Radios（SDR）（SDR）以及其他应用程序的广泛带宽。 这项研究的重点是电路和信号处理和控制算法的开发，这些算法将有效地解决互补的金属氧化物 - 氧化 - 氧化型 - 氧化物 - 气管导体（CMOS）实施的损害，该新型DAC拓扑旨在适应超宽带宽。虽然CMOS制造过程可能是针对数字处理器和内存量身定制的，但它是设计高性能，动态范围模拟电路的最具挑战性的环境。 开发的解决方案基本上为DAC提供了自我修复？使其能够克服不可避免的障碍的功能，例如设备不匹配，非线性和时机错位。 初步结果表明了拟议的建筑和方法的有效性，预计将是1阶段研究的制造设计的设计。 该项目的更广泛的影响/商业潜力在于允许将超高的绩效数据转换功能集成到低成本的CMOS系统芯片（SOC）解决方案中，这些解决方案被广泛用于从通信和多媒体到仪器的各种类型的商业应用中。特别是，正在开发的技术将允许在真正的SDR中对这一最关键功能的集成和低成本实现。提出的创新，针对不可避免的障碍的影响（例如制造过程的变化，不匹配，非线性和时间误差），以实现不可避免的损害的影响，并通过使用新颖的内置校准和补偿循环和算法来实现10-B的超级级别（E. E. E. E. E. 16），从而实现新颖的内置校准和赔偿，并将其定时（不及时）。在制造时进行测试，生产收益损失，激光修剪或传统设计和制造高性能模拟集成电路的任何其他结果。 要开发的方法对芯片制造有更广泛的影响，因为这些障碍也代表了其他功能中的限制因素。 作为一项有利的技术，提出的创新可能会大大增加现有数据转换器市场的规模，目前为$ 3B，并允许需要各种新的消费应用程序，在这些新型消费应用程序中需要宽泛的运营带宽，并且成本是一个限制。