Collaborative Research: An Efficient Programming Model for HPC Applications on Next-Generation High-end Parallel Machines

协作研究：下一代高端并行机上 HPC 应用的高效编程模型

• 批准号: 0833152
• 负责人: Yuesheng Xu
• 金额: $ 7万
• 依托单位: Syracuse University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-09-15 至 2010-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0833152&HistoricalAwards=false
• 关键词: Collaborative; Research; Efficient; Programming; Model

Next-generation high-end machines will include interconnected computer nodes, each having heterogeneous accelerators and multi-core CPUs with complex memory hierarchy. They demand a programming model with a unified abstraction for programming dramatically different on-chip and off-chip parallel processing capabilities. None of the existing models is suitable for this need. The most fundamental challenge here is natural expression of parallelism in applications and efficient mapping of such parallelism to the hardware, including data distribution, locality, communication, synchronization, and load balancing. This collaborative research between Syracuse University and Sandia Labs aims at developing an efficient programming model for high performance computing (HPC) applications using multi-core and heterogeneous processors. The specific goal of this study is to develop a high-level parallel programming abstraction with new high-level language constrctions, data types, and runtime library. Hardware features such as cores, memory hierarchy, processor heterogeneity, and interconnection will be embedded in the semantics of the language constructs and data types. The programming abstraction will guide the design and expression of parallel algorithms in the high-level language, mapped automatically onto the hardware for efficient execution. Users will be free from the low-level hardware details. The approaches include: memory virtualization,communication virtualization and processors virtualization.

下一代高端机器将包括互连的计算机节点，每个节点都具有异构加速器和具有复杂内存层次结构的多核CPU。他们需要一个具有统一抽象的编程模型，用于对截然不同的片上和片外并行处理功能进行编程。现有的模型都无法满足这种需求。这里最基本的挑战是应用程序中并行性的自然表达以及这种并行性到硬件的有效映射，包括数据分布、局部性、通信、同步和负载平衡。雪城大学和桑迪亚实验室之间的这项合作研究旨在为使用多核和异构处理器的高性能计算 (HPC) 应用程序开发高效的编程模型。本研究的具体目标是使用新的高级语言结构、数据类型和运行时库开发高级并行编程抽象。核心、内存层次结构、处理器异构性和互连等硬件功能将嵌入到语言结构和数据类型的语义中。编程抽象将指导高级语言中并行算法的设计和表达，并自动映射到硬件上以实现高效执行。用户将摆脱底层硬件细节的束缚。 其方法包括：内存虚拟化、通信虚拟化和处理器虚拟化。