GOALI (Industry-University Collaborative Project): Collaborative Research: Scalable Techniques for Detecting Small-Delay Defects in Nanometer Integrated Circuits

GOALI（产学合作项目）：合作研究：检测纳米集成电路中小延迟缺陷的可扩展技术

• 批准号: 0823835
• 负责人: Krishnendu Chakrabarty
• 金额: $ 23.52万
• 依托单位: Duke University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-09-01 至 2011-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0823835&HistoricalAwards=false
• 关键词: GOALI; Industry; University; Collaborative; Project

ObjectiveThe objective of this project is to develop new test techniques that target small-delay defects in nanoscale integrated circuits. The approach is based on the use of the output-deviations measure as a surrogate "long-path" coverage metric for small-delay defects. The project will be carried out in partnership with AMD Corporation and other industrial collaborators. Intellectual Merit: Small-delay defects, induced by process variations, crosstalk, power-supply noise, and resistive opens/shorts, etc., are major quality and reliability concerns in the semiconductor industry. Current industry practices are not only inadequate for small-delay defects, but test costs are skyrocketing as well (estimated to be more than 50% of manufacturing cost). This project is focused on test generation using scalable methods that can provide comprehensive defect screening for industrial circuits. It includes the following components: (i) a gate-delay-defect probability measure to model delay faults; (ii) use of gate-delay-defect probabilities for computing output deviations; (iii) layout-aware, deviation-based test-pattern selection/generation for high defect coverage.Broader Impacts: This project will lead to higher shipped-product quality, increased in-field reliability, and reduced test cost. Benefits for society include reliable electronics for healthcare, cheaper and dependable computing platforms for servers, weather forecasting, financial transactions, and more, and realization of the much sought-after zero-defects for automotive applications. Students will be trained for the workforce through research experience, coursework, and relevant industry internships. A concerted effort will be made to involve under-represented groups, for example through the Semiconductor Research Corporation fellowship programs. Tutorials will be presented and special sessions will be organized at major conferences.

该项目的客观性目的是开发针对纳米级集成电路中小延迟缺陷的新测试技术。 该方法基于将输出问题量度用作小延迟缺陷的替代“长路径”覆盖率的使用。 该项目将与AMD公司和其他工业合作者合作进行。智力优点：由过程变化，串扰，供电噪声和电阻打开/短裤等引起的小延迟缺陷是半导体行业的主要质量和可靠性问题。 当前的行业实践不仅不足以延迟缺陷，而且测试成本也飙升（估计占制造成本的50％以上）。 该项目的重点是使用可扩展方法的测试生成，这些方法可以为工业电路提供全面的缺陷筛查。 它包括以下组件：（i）一个栅极 - 缺陷概率度量，以模型延迟故障； （ii）使用栅极 - 缺陷概率来计算输出偏差； （iii）对高缺陷覆盖范围的布局意识，基于偏差的测试模式选择/生成。Boader的影响：该项目将导致较高的运输产品质量，增加场地可靠性以及降低的测试成本。 对社会的好处包括用于医疗保健的可靠电子产品，用于服务器的便宜和可靠的计算平台，用于服务器，天气预报，金融交易以及更多，以及实现了众所周知的汽车应用零缺陷。通过研究经验，课程和相关行业实习，将对学生培训劳动力。将一致努力涉及代表性不足的群体，例如通过半导体研究公司奖学金计划。 将介绍教程，并在主要会议上组织特别会议。