ITR: Optimization of Reconfigurable Architectures for Efficient Implementation of Particle Filters

ITR：优化可重构架构以高效实现粒子滤波器

• 批准号: 0220011
• 负责人: Petar Djuric
• 金额: $ 35.98万
• 依托单位: SUNY at Stony Brook
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2002
• 资助国家: 美国
• 起止时间: 2002-10-01 至 2006-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0220011&HistoricalAwards=false
• 关键词: ITR; Optimization; Reconfigurable; Architectures; Efficient

ABSTRACT0220011Djuric, PetarSUNY @ Stony BrookOptimization of Reconfigurable Architectures for Efficient Implementation of Particle FiltersIn recent years particle filters have attracted great attention in several research communities. These filters are used in problems where time-varying signals must be processed in real time and the objective is to estimate various unknowns of the signals and to detect events described by the signals. The standard solutions of such problems in many applications are based on the Kalman or extended Kalman filters. In situations when the problems are highly nonlinear or the noise that distorts the signals is non-Gaussian, the Kalman filters provide solutions that may be far from optimal. A major drawback of the particle filters is that their implementation is computationally very intensive. They are, however, inherently parallelizable, and special hardware can be built for their implementation that can meet the stringent requirements of real-time processing. In this research, reconfigurable and physically feasible VLSI architectures for particle filters are developed. In the development of these architectures, many important problems are researched. The most critical of them is the balancing of hardware and software, which itself is tightly related to other important issues. They include reductions of computational complexities by transformations and approximations, investigation of the degree of parallelism implemented in the filter, investigation of various interconnection mechanisms, random communication schemes, hardware optimization, and design of low power VLSI processors. This effort also includes building of reconfigurable hardware so that it is suitable for different types of particle filters.

Abstract02220011DJuric，Petarsuny @ Stony Brookopimation对可重构体系结构有效实施粒子过滤器，粒子过滤器在几个研究社区中引起了极大的关注。这些过滤器用于必须实时处理时间变化信号的问题，目的是估计信号的各种未知数并检测信号所描述的事件。在许多应用中，此类问题的标准解决方案基于卡尔曼或扩展的卡尔曼过滤器。在问题高度非线性或扭曲信号的噪声的情况下，卡尔曼过滤器提供的解决方案可能远非最佳。 粒子过滤器的主要缺点是它们的实现在计算上非常密集。但是，它们是固有的，可以并行，并且可以为其实施而构建特殊的硬件，以满足实时处理的严格要求。在这项研究中，开发了可重新配置和物理可行的VLSI架构，用于粒子过滤器。在这些架构的开发中，研究了许多重要的问题。它们最关键的是硬件和软件的平衡，这本身与其他重要问题密切相关。它们包括通过转换和近似值来减少计算复杂性，对过滤器实现的并行度的研究，各种互连机制的研究，随机通信方案，硬件优化以及低功率VLSI处理器的设计。这项工作还包括构建可重构硬件，以便适用于不同类型的粒子过滤器。