Advanced Large-Scale Optimization Approaches to Solve Modern Circuit Layout Problems

解决现代电路布局问题的先进大规模优化方法

• 批准号: RGPIN-2016-03833
• 负责人: Vannelli, Anthony
• 金额: $ 1.75万
• 依托单位: Wilfrid Laurier University
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2022
• 资助国家: 加拿大
• 起止时间: 2022-01-01 至 2023-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=753201
• 关键词: Advanced; Large; Scale; Optimization; Approaches; Advanced; Large; Scale; Optimization; Approaches

The design of many fundamental manufacturing and circuit layout problems can be modeled as linear or nonlinear combinatorial optimization problems. All of these problems are NP-hard. Very tight performance specifications for these problems (i.e., minimum wirelength, minimum area, minimum power and congestion) demand near optimal designs subject to many millions to billions of variables and constraints. Over the last six years, we have developed efficient optimization techniques that can be used to solve these problems using interior point and semidefinite programming approaches that can be solved in polynomial time.There are two main objectives in developing this research program and direction. First, a major objective of the proposed research program is aimed at "integration" of large-scale interior point methodologies used in linear, quadratic, convex, second-order cone programming to form the basis of generating relative placements and routings with "little or no overlap" while reducing wirelength and area. A second major objective is to develop promising approaches to "allow optimizers to scale"; that is, predictable fast running times will be achieved as problem size increases beyond a million constraints and variables for these present day layout problems. To achieve these objectives during the next five years, two novel approaches to solve large optimization problems containing more than a million variables and constraints will be developed. First, recent advances in "matrix free" interior-point approaches will allow the scope and size of solved problems to be in the order of millions or billions of variables and constraints. Second, we plan to accelerate interior-point algorithms using new warmstarting techniques to speed up the running time of for these very large problems. Initial focus will be on the generation of Very Large Scale Integrated (VLSI) circuit layout for "standard cell" and "mixed cell" technologies that still form a major part of integrated circuit design. Second, the exploration of analytic-based models and large-scale nonlinear interior-point solvers will be developed to solve emerging large placement problems arising in Field Programmable Gate Array (FPGAs) layout. Another equally important "objective" of this research is to reduce the need for search techniques such as simulated annealing, genetic algorithms and Tabu search to further reduce wirelength and area as well as timing, delay, power and congestion problems. In this overall research program, we plan to minimally use search techniques to refine feasible starting solutions that are generated by the powerful interior point or semidefinite programming solvers. The aim is to use mathematical programming models of placement, floorplanning and global routing and to solve them as efficiently as possible to reduce or ideally eliminate the need for search techniques.

许多基本制造和电路布局问题的设计可以建模为线性或非线性组合优化问题。所有这些问题都是NP-HARD。这些问题的性能规格非常紧密（即，最小线长，最小面积，最小功率和拥塞）的需求靠近最佳设计，但受到数百万至数十亿个变量和约束的影响。在过去的六年中，我们开发了有效的优化技术，可用于使用内部点和半决赛编程方法来解决这些问题，这些方法可以在多项式时间内解决。首先，拟议的研究计划的一个主要目标旨在“整合”在线性，二次，凸，凸，二阶锥体编程中使用的大规模内部方法，以构成与“少或没有重叠”的相对位置和路由的基础，同时降低线长和区域。第二个主要目标是开发有希望的方法来“允许优化者扩展”；也就是说，随着问题大小的增加超过了当今布局问题的一百万个约束和变量，将实现可预测的快速运行时间。为了在接下来的五年中实现这些目标，将开发两种新的方法来解决包含超过一百万个变量和约束的大型优化问题。首先，“无基质”内点方法的最新进展将使解决问题的范围和大小按数百万或数十亿个变量和约束的顺序。其次，我们计划使用新的热门技术加速内点算法，以加快这些非常大问题的运行时间。 最初的焦点将放在“标准单元”和“混合电池”技术的非常大规模集成（VLSI）电路布局的产生上，这些电路仍然构成了集成电路设计的主要部分。其次，将开发对基于分析的模型和大规模非线性内部求解器的探索，以解决在现场可编程栅极阵列（FPGAS）布局中引起的出现的大型放置问题。 这项研究的另一个同样重要的“客观”是减少对搜索技术的需求，例如模拟退火，遗传算法和禁忌搜索，以进一步降低电线长度和面积以及时间安排，延迟，功率和拥塞问题。在整个研究计划中，我们计划最少使用搜索技术来完善由功能强大的内部点或半决赛编程求解器生成的可行的起始解决方案。目的是使用位置，平面图和全球路由的数学编程模型，并尽可能有效地解决它们，以减少或理想地消除对搜索技术的需求。