Direct Writing of Nanodevices: A Sustainable Route to Nanofabrication

纳米器件的直接写入：纳米制造的可持续之路

• 批准号: EP/X016404/1
• 负责人: David Lewis
• 金额: $ 179.15万
• 依托单位: University of Manchester
• 依托单位国家: 英国
• 项目类别: Research Grant
• 财政年份: 2023
• 资助国家: 英国
• 起止时间: 2023 至 无数据
• 项目状态: 未结题
• 来源: https://gtr.ukri.org/projects?ref=EP%2FX016404%2F1
• 关键词: Direct; Writing; Nanodevices; Sustainable; Route

The ability to write structures at the nanoscale using lithography underpins modern society. The electronic devices we take for granted contain integrated circuits (ICs), and the key component of those circuits are field-effect transistors (FETs). They have reduced in size by a factor of two every two years for over forty years, following "Moore's Law". The roadmap for the electronics industry now assumes that this constant reduction of size will continue - at least until the mid-2020s. At the end of 2019, Extreme ultraviolet lithography (EUVL) began to be used to manufacture FinFETs (i.e. FETs that resemble a Fin) as part of ICs at the 7 nm node. Unfortunately, EUVL has an astronomical cost, where each tool costs > $100 M dollars with similarly costs for maintenance. It is evident that this is a colossal investment for larger' semiconductor manufacturers i.e. Intel, TSMC, Samsung, Global Foundries, Infineon, LG. The cost is not sustainable which has led the International Technology Roadmap for Semiconductors (ITRS) to declare that it will no longer be economically feasible to decrease FET device dimensions past the 5 nm node. This has led to significant uncertainty in the future direction of the semiconductor industry, especially for smaller manufacturers that risk being priced out of the market. Additionally, lithography is a subtractive process and very energy demanding. Layers are added in manufacture that are then largely etched away during fabrication. This is wasteful and more sustainable processes are needed moving forward. Equally, plasma etching for the step where the lithographed structure is transferred into the substrate (silicon or compound semiconductor) uses a large amount of energy. If we could directly write structures we would use less precursor, produce less waste and reduce energy consumption and potentially make the process sustainable as well as accessible for smaller manufacturers. In this proposal, we will demonstrate a new sustainable and relatively inexpensive manufacturing process that will allow less waste and reduce energy consumption and potentially make the process sustainable as well as accessible for smaller manufacturers in the UK and beyond. This new manufacturing technique is based on the decomposition of molecular precursor molecules in ion beams. As these precursors have preformed metal-chalcogen bonds they decompose in the ion beam directly to useful semiconductors such as metal oxides and metal sulfides, with written pattern resolutions beyond the 7 nm node, at a fraction of the time and processing cost compared to extant processes in the semiconductor industry. We will demonstrate that a number of useful nanoscale devices for (i) thermoelectric energy generation (ii) single photon detection above 77K and (iii) logic circuits for 16 bit memory can be prepared in this way, written at resolutions beyond what is currently possible to most small semiconductor businesses in the UK. This work is nationally important and extremely timely; approximately 13 sextillion (10e22) transistors have been made by lithography. For example, there are 8.5 billion FETs in a new smartphone and around 3.5 billion smartphones on the planet. For the UK to compete in the next generation of devices at the 7 nm node we need innovative and sustainable approaches; we do not have companies large enough to invest in EUV writing tools (for example: we do not have an equivalent to Global Foundries, Samsung, TSMC, or Intel) to lead UK activity in this area, and to not address this deficiency in a key technological underpinning tool would mean the UK falling behind significantly in emerging technologies. By funding this proposal the UK can begin to address this deficit in its manufacturing capability.

使用光刻的现代社会在纳米级上编写结构的能力。我们认为，我们认为的电子设备包含集成电路（ICS），这些电路的关键组件是现场效应晶体管（FET）。在“摩尔定律”之后，在四十年中，每两年每两年的规模减少了两倍。现在，电子行业的路线图假设这种不断减小的规模将持续 - 至少直到2020年代中期。在2019年底，极端的紫外线光刻（EUVL）开始用于制造7 nm节点的ICS的一部分，以制造FinFets（即类似于鳍的FET）。不幸的是，EUVL的成本是天文数字，每个工具的成本> 100 m美元，维护成本类似。显然，这是对大型半导体制造商的巨大投资，即英特尔，TSMC，三星，全球铸造厂，Infineon，LG。成本是不可持续的，这导致半导体（ITRS）的国际技术路线图宣布，降低超过5 nm节点的FET设备尺寸将不再是经济上的。这导致了半导体行业未来方向的严重不确定性，尤其是对于较小的制造商而言，冒着价格售出市场的较小制造商。此外，光刻是一个减法过程，并且非常需要能量。在制造过程中添加了层，然后在制造过程中大部分蚀刻了。这是浪费的，需要更可持续的流程前进。同样，在将石版画结构转移到底物（硅或复合半导体）中的步骤中，血浆蚀刻使用大量能量。如果我们可以直接编写结构，我们将使用较少的前体，减少浪费并减少能耗，并有可能使该过程可持续以及适合较小的制造商使用。在此提案中，我们将展示一个新的可持续性且相对便宜的制造过程，该过程将减少浪费，减少能源消耗，并有可能使英国及以后的较小制造商可使用该过程。这种新的制造技术基于离子束中分子前体分子的分解。由于这些前体具有预先形成的金属 - chalcen键，它们直接在离子束中分解为有用的半导体，例如金属氧化物和金属硫化物，与半导体工业中现成的过程相比，与7 nm节点的书面图案分辨率超过7 nm节点相比。我们将证明（i）（i）热电学产生的许多有用的纳米级设备（ii）以上的16位存储器的逻辑电路（ii）可以以这种方式编写，并以这种方式编写以超出目前的分辨率编写，以超出目前的分辨率，以超出目前的分辨率。这项工作在全国范围内很重要，而且非常及时。大约130亿（10E22）的晶体管是通过光刻制成的。例如，新的智能手机中有85亿个FET，地球上有约35亿智能手机。要使英国在7 nm节点的下一代设备中竞争，我们需要创新和可持续的方法；我们没有足够大的公司来投资于EUV写作工具（例如：我们没有等同于全球铸造厂，三星，TSMC或Intel）来领导英国在这一领域的活动，并且不能解决关键技术基础工具中的这种缺陷，这意味着英国在新兴技术中落后于大量落后于新兴技术。通过资助这一建议，英国可以开始解决其制造能力的这种赤字。