Time-Dependent Variability: A test-proven modelling approach for systems verification and power consumption minimization

随时间变化：经过测试验证的系统验证和功耗最小化建模方法

基本信息

批准号：
EP/L010585/1
负责人：
Asen Asenov
金额：
$ 56.98万
依托单位：
University of Glasgow
依托单位国家：
英国
项目类别：
Research Grant
财政年份：
2014
资助国家：
英国
起止时间：
2014 至无数据
项目状态：
已结题

来源：
https://gtr.ukri.org/projects?ref=EP%2FL010585%2F1
关键词：
Time Dependent Variability test proven

项目摘要

Following the Moore's law the semiconductor industry has delivered continuous increase of systems functionality and speed over the last 50 years through the aggressive downscaling of the transistors. In the last 20 years the UK IC-design based industry has grown to a level of national and international importance. While IC designers in the past enjoyed the freedom that all transistors in a chip could be treated identically, this is no longer the case for the nano-meter sized transistors used in the present and future technologies. Statistical device-to-device variation is introduced by the discreteness of charge and granularity of matter and is inversely proportional to gate area, so that its impact on circuits increases with the reduction of transistor dimensions. When the number of logic gates in a system increases and the architecture becomes more complex, the tolerance to variability is greatly reduced. Even if two devices were identical after fabrication, they could suffer from different aging during operation, causing a time-dependent variability (TDV). TDV is becoming a major threat to the correctness of electronic systems, but there are no tools for its verification because of the lack of a complete understanding. The aim of this project is to carry out an in-depth investigation of the defects and mechanisms responsible for TDV and, based on that, to develop a test-proven TDV simulator, allowing IC designers to assess the impact of TDV on their circuits. The researchers at Glasgow University have pioneered variability simulation and the researchers at Liverpool John Moores University have specialised in experimental characterization of defects. Their highly complementary skills bring them together and make them well positioned to tackle this challenge. By working together with UK companies, the impact of their work on UK industry will be direct. The collaboration with IMEC and its industrial consortium also opens an effective impact pathway on an international scale. The successful control of TDV will deliver reliable electronic products and minimize their power consumption.

遵循摩尔定律，半导体行业在过去 50 年里通过大幅缩小晶体管尺寸，不断提高系统功能和速度。在过去 20 年中，英国的 IC 设计产业已发展到在国内和国际上具有重要地位的水平。虽然 IC 设计人员过去享有芯片中所有晶体管都可以得到相同处理的自由，但对于当前和未来技术中使用的纳米尺寸晶体管来说，情况已不再如此。器件间的统计变化是由电荷的离散性和物质的粒度引起的，并且与栅极面积成反比，因此其对电路的影响随着晶体管尺寸的减小而增加。当系统中逻辑门的数量增加并且架构变得更加复杂时，对可变性的容忍度就会大大降低。即使两个器件在制造后完全相同，它们在运行过程中也可能会遭受不同的老化，从而导致随时间变化（TDV）。 TDV正在成为电子系统正确性的主要威胁，但由于缺乏完整的理解，没有工具对其进行验证。该项目的目的是深入研究TDV的缺陷和机制，并在此基础上开发经过测试验证的TDV模拟器，使IC设计人员能够评估TDV对其电路的影响。格拉斯哥大学的研究人员开创了可变性模拟的先河，利物浦约翰摩尔斯大学的研究人员专门研究缺陷的实验表征。他们高度互补的技能将他们聚集在一起，使他们能够很好地应对这一挑战。通过与英国公司合作，他们的工作对英国工业的影响将是直接的。与IMEC及其产业联盟的合作也开辟了一条在国际范围内有效影响的途径。 TDV 的成功控制将提供可靠的电子产品并最大限度地降低其功耗。