Computer-Aided-Design for Analog-Digital Mixed Large Scaled Integration Circuits

模数混合大规模集成电路的计算机辅助设计

基本信息

批准号：
07650399
负责人：
WATANABE Takahiro
金额：
$ 0.9万
依托单位：
Yamaguchi University
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (C)
财政年份：
1995
资助国家：
日本
起止时间：
1995 至 1996
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-07650399/
关键词：
Analog LSI Analog-Digital Mixed CAD Layout Layout Constraints MCM Test アナログLSI 大規模集積回路

项目摘要

(1) Analog Layout Constraints were classified into two groups, constraints explicitly specified by human designers and constraints implicitly derived from circuit design specifications. The latter must be well-defined and incorporated in a design data-base.(2) A device-level global rouitng algorithm was proposed in order to obtain high-performance detailed routing under various layout constraints. The algorithm was also improved to increase efficiency and to meet with a larger layout problem, introducing a new layout-evaluation, function and a divide-and-conquer technique.(3) A multi-layrs rouitng problem was disscussed for Multi-Chip Modules (MCM). An MCM technology is usually used as higher-density packaging technology, but its routing ploblems are similar to analog routing problems such that minimum wire-length, less routing-layrs or less vias used, and preventing signal interference or cross-talk noise. We improved a V4R algorithm and experimental results show that our approach is fairly good in the total routing length. We also discussed algorithm parameters to obtain an optimum routes.(4) Commercial CAD systems were investigated and tried to design some sample circuit, a micro-proceesor and an simple application circuit. Design efficiency was compared between HDL design and conventional gate-level design. We also discussed test generation problems, and proposed an efficient testing for combinatorial circuits and a redundant fault detection for sequential circuits.

(1) 模拟布局约束分为两类：由设计人员明确指定的约束和从电路设计规范隐式导出的约束。后者必须被明确定义并纳入设计数据库中。(2)提出了一种器件级全局布线算法，以便在各种布局约束下获得高性能的详细布线。为了提高效率和解决更大的布局问题，还对算法进行了改进，引入了新的布局评估、函数和分而治之技术。(3)讨论了多芯片模块的多层布线问题。（MCM）。 MCM技术通常被用作更高密度的封装技术，但其布线问题与模拟布线问题类似，例如最小线长、更少的布线层或更少的过孔，以及防止信号干扰或串扰噪声。我们改进了V4R算法，实验结果表明我们的方法在总路由长度方面相当不错。我们还讨论了算法参数以获得最佳路线。(4)研究了商业CAD系统并尝试设计一些示例电路、微处理器和简单的应用电路。比较了 HDL 设计和传统门级设计的设计效率。我们还讨论了测试生成问题，并提出了组合电路的有效测试和时序电路的冗余故障检测。