ダイヤモンド薄膜表面の導電性制御によるハイパワー高周波トランジスタの開発

通过控制金刚石薄膜表面的电导率开发高功率高频晶体管

基本信息

批准号：
15206043
负责人：
KAWARADA Hiroshi
金额：
$ 30.28万
依托单位：
Waseda University
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (A)
财政年份：
2003
资助国家：
日本
起止时间：
2003 至 2005
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-15206043/
关键词：
diamond H-terminated surface accumulated layer RF power transistor field-effect transistor focused ion beam boron doped diamond Al_2O_3 insulator film submicron lithography 電界効果型トランジスタ遮断周波数ナノスケール表面修飾低抵抗オーミック領域 MISFET 最大発振周波数 /

项目摘要

Four of the elemental techniques were developed to improve the performance and the stabilization of the diamond transistors. (1)Fabrication technique of the low resistive layer, less than 1kΩ/sq, utilizing focused ion beam. (2)Deposition technique of the thermally stable ultrahigh-concentration boron doped diamond(specific resistance : 2×10^<-4>[Ωcm], boron concentration 1.4×10^<22>cm^<-3>]). (3)Film formation technique of high quality Al_2O_3 gate insulator with very low gate leakage current, three orders of magnitude smaller than the conventional CaF_2 insulator film. (4)Control of the threshold voltage with ozone treatment aimed at low dissipation power.De-embedding method, the most widely used method for the evaluation of RF devices, was employed to evaluate the intrinsic characteristics of the diamond MISFETs. And the normal effective field dependency of the mobility of the hole accumulation layer was clarified aimed at analyzing the carrier traveling mechanism in the accumulation … More layer. As device fabrication process technology, the self-alignment technique for the fabrication of the fine gate with less than 0.2μm gate length, and the T-shape gate electrode fabrication process for lowering the gate resistance were established.The diamond MISFETs were fabricated utilizing the fine process technology described before. An f_T cut-off frequency of 30GHz and an f_<max> cut-off frequency of 48GHz were obtained for the 0.15μm gate length MISFETs. And the fabrication of diamond MISFETs with Al_2O_3 gate insulator has been succeeded. They yield f_T=30GHz and f_<max>=6oGHzz for the thickness of gate insulator of 3nm and the gate length of 0.3μm. In addition, we have employed load-pull measurement on diamond MISFETs for the first time and obtained 2.14W/mm output power density at 1GHz for the gate length of 100μm and the gate length of 0.3μm. The value is superior to the reported power density of GaAs FETs or Si LDMOS ; therefore it confirms the advantage of the diamand MISFETs as high power RF transistor. Less

开发了四种基本技术来提高金刚石晶体管的性能和稳定性（1）利用聚焦离子束的低电阻层制造技术（2）热稳定沉积技术。超高浓度硼掺杂金刚石（电阻率：2×10^<-4>[Ωcm]，硼浓度1.4×10^<22>cm^<-3>]) (3)高质量Al_2O_3栅绝缘体成膜技术，栅漏电流极低，比传统CaF_2绝缘体薄膜小三个数量级。通过臭氧处理控制阈值电压，以实现低耗散功率。采用去嵌入方法（射频器件评估中最广泛使用的方法）来评估金刚石的固有特性并阐明了空穴累积层迁移率的正常有效场依赖性，旨在分析累积层中的载流子传输机制，作为器件制造工艺技术，自对准用于精细制造技术。建立了小于0.2μm栅极长度的栅极，并建立了降低栅极电阻的T形栅电极制造工艺。利用前面描述的精细工艺技术制造了金刚石MISFET，f_T截止频率为。 0.15μm栅长的MISFET的频率为30GHz，f_<max>截止频率为48GHz，并成功制作了Al_2O_3栅绝缘体的金刚石MISFET，其f_T=30GHz，f_<max>=6oGHzz。栅极绝缘体厚度为3nm，栅极长度为0.3μm，此外，我们还采用了负载牵引。首次在金刚石 MISFET 上进行测量，在 1GHz 下，栅极长度为 100μm 和栅极长度为 0.3μm 时输出功率密度为 2.14W/mm，该值优于报道的 GaAs FET 或 Si LDMOS 的功率密度；它证实了金刚石 MISFET 作为高功率 RF 晶体管的优势。

项目成果

期刊论文数量（156）

专著数量（0）

科研奖励数量（0）

会议论文数量（0）

专利数量（0）

Superconductivity in diamond thin films well above liquid helium temperature

DOI：
10.1063/1.1802389
发表时间：
2004-06
期刊：
Applied Physics Letters
影响因子：
4
作者：
Y. Takano;M. Nagao;K. Kobayashi;H. Umezawa;I. Sakaguchi;M. Tachiki;T. Hatano;H. Kawarada
通讯作者：
Y. Takano;M. Nagao;K. Kobayashi;H. Umezawa;I. Sakaguchi;M. Tachiki;T. Hatano;H. Kawarada

Over 20 GH_2 Cut-Off Frequency Deep Sub-micron Gate Diamond MISFET

超过 20 个 GH_2 截止频率深亚微米栅极金刚石 MISFET