SHF: SMALL: Collaborative Research: Reconfigurable and Programmable Processor Architectures for Brain-Computer Interfacing

SHF：小型：协作研究：用于脑机接口的可重构和可编程处理器架构

基本信息

批准号：
2007131
负责人：
Amirhossein Alimohammad
金额：
$ 32万
依托单位：
San Diego State University Foundation
依托单位国家：
美国
项目类别：
Standard Grant
财政年份：
2020
资助国家：
美国
起止时间：
2020-07-01 至 2024-06-30
项目状态：
已结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=2007131&HistoricalAwards=false
关键词：
SHF SMALL Collaborative Research Reconfigurable

项目摘要

One of the primary motivations of brain-computer interfaces (BCIs) is to restore behavioral functions for patients who are unable to move or communicate through normal neural pathways because of strokes or chronic diseases. Restoring a full range of movements for paralyzed patients requires recordings from a relatively large population of brain neurons. Wireless transmission of large amounts of neural data for off-line processing on a computer imposes heat-related tissue damage and hinders real-time control of the prosthetics. In this SHF collaborative research, a foundation is laid for finding an optimal balance between real-time neural-signal processing using a brain-implantable electronic device and wireless data transmission for offline processing on a machine or computer so that the total power/energy consumption of the brain-implanted integrated circuit is minimized. This research focuses on a transformative BCI-specific processor architecture utilizing custom digital circuits to drastically relax power-hungry wireless data transmission while controlling prosthetics in real-time. The impact of research findings on education and society include: broadening the participation of underrepresented high school students using the new "Brain Chips" outreach program; enhancing educational learning via the "lab-at-home" approach; engaging the local community and broader society, especially those with disabilities, via workshops at the Disability Center San Diego; and contributing to rehabilitation and improving the quality of life of millions of patients suffering from neurodegenerative diseases or paralysis.This research creates a hybrid processor that is both software-programmable to efficiently execute neural-signal processing algorithms and hardware-reconfigurable to adopt a configurable instruction set architecture (ISA). The software-programmability supports the continuing evolution of approaches and algorithmic improvements while utilizing lower silicon area. Rather than optimized algorithms mapped onto a fixed-processor architecture, the processor optimally matches the specific requirements of the BCI algorithms at runtime by adopting a configurable ISA instead of a fixed and predetermined set of instructions and hence attains greater energy efficiency. The processor also utilizes various dedicated hardware architectures, including artificial and spiking neural networks, for area and energy-efficient processing of neural signals, transmitting only the translated commands directly to prosthetic devices and thus, minimizing the wireless communication overhead.To find and assess candidate neural-signal processing algorithms for real-time operation on the brain-implantable processor, this multidisciplinary research boosts the search in the large design space of neural-signal processing via a software-based performance and accuracy analysis tool that will reliably measure their important characteristics. By quantitatively comparing the potential neural-signal processing algorithms using meaningful efficiency and accuracy metrics, the BCI-specific processor and dedicated hardware architectures will be optimized for energy-efficient operation. The hybrid processor architecture and the design specifications are optimized by testing the BCI system at the Washington National Primate Research Center at the University of Washington in macaque monkeys.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

大脑计算机界面（BCI）的主要动机之一是恢复因中风或慢性疾病而无法通过正常神经途径移动或通信的患者的行为功能。恢复瘫痪的患者的全部运动需要从相对较大的脑神经元群体中进行记录。无线传输大量的神经数据以在计算机上进行离线处理会造成与热有关的组织损害，并阻碍对假体的实时控制。在这项SHF协作研究中，奠定了基础，旨在在实时神经信号处理之间使用可脑化的电子设备和无线数据传输在机器或计算机上的离线处理，以便最小化脑植入式集成电路的总功率/能量消耗。这项研究重点是使用自定义数字电路的变革性BCI特定的处理器体系结构，以极大地放松渴望的无线数据传输，同时实时控制假肢。研究结果对教育和社会的影响包括：使用新的“脑芯片”外展计划扩大代表性不足的高中生的参与；通过“实验室”方法增强教育学习；通过圣地亚哥残疾中心的研讨会，吸引当地社区和更广泛的社会，尤其是残疾人的社会；并促进康复和改善数百万患有神经推导性疾病或瘫痪的患者的生活质量。这项研究创建了一个混合处理器，既可以有效地执行神经信号处理算法，又可以通过软件进行编程，从而可以采用可配置的教学架构（ISA）。该软件的程序能力支持方法和算法改进的持续发展，同时利用下硅区域。该处理器没有优化映射到固定处理器体系结构上的算法，而是通过采用可配置的ISA而不是固定且预定的指令集，从而最佳地匹配了运行时BCI算法的特定要求，从而实现了更大的能源效率。 The processor also utilizes various dedicated hardware architectures, including artificial and spiking neural networks, for area and energy-efficient processing of neural signals, transmitting only the translated commands directly to prosthetic devices and thus, minimizing the wireless communication overhead.To find and assess candidate neural-signal processing algorithms for real-time operation on the brain-implantable processor, this multidisciplinary research boosts the search通过基于软件的性能和准确性分析工具，在神经信号处理的较大设计空间中，该工具将可靠地衡量其重要特征。通过使用有意义的效率和准确度指标进行定量比较潜在的神经信号处理算法，BCI特定的处理器和专用硬件体系结构将被优化用于节能操作。通过在华盛顿大学的华盛顿国家灵长类动物研究中心测试Macaque Monkeys的华盛顿国家灵长类动物研究中心通过测试BCI系统的混合处理器架构和设计规范。该奖项反映了NSF的法定任务，并被认为是值得通过基金会的知识分子优点和更广泛的影响审查标准来通过评估来通过评估来支持的。