CAREER: Compiler and Runtime Support for Irregular Applications on Many-core Processors

职业：多核处理器上不规则应用程序的编译器和运行时支持

• 批准号: 1741683
• 负责人: Michela Becchi
• 金额: $ 42.5万
• 依托单位: North Carolina State University
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-01-01 至 2022-01-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1741683&HistoricalAwards=false
• 关键词: CAREER; Compiler; Runtime; Support; Irregular

Many-core processors (such as GPUs) have been used to accelerate a wide variety of applications: molecular dynamics, image processing, data mining, option pricing and linear algebra, among others. Despite their widespread adoption, these devices are still considered relatively difficult to use, in that they require the programmer to be familiar both with parallel programming and with the operation of the hardware. In particular, the effective deployment of irregular applications on many-core devices is still far from understood. However, many established and emerging applications (from social and computer networking, electrical circuit modeling, discrete event simulation, compilers, and computational sciences) are irregular in nature, being based on data structures such as graphs and trees. This research proposes compiler and runtime techniques to support the deployment of graph and other irregular applications on many-core processors, while hiding from the programmer the complexity and heterogeneity of the underlying hardware and software stack. Since the degree of parallelism within irregular applications is heavily data dependent, the proposed compiler techniques aim to generate multiple platform-specific code variants starting from high-level platform-agnostic algorithmic descriptions. The runtime techniques focus on the selection of the most appropriate code variant and its tuning to the hardware and the input datasets. More specifically, this research covers three important issues related to irregular applications: (i) the effective handling of nested parallelism (in the form of parallelizable nested loops and recursive functions) within irregular applications; (ii) the design of a dynamic memory allocation library that can scale to the degree of multithreading offered by many-core devices, and of graph encoding schemes suitable for applications operating on dynamic datasets; and (iii) the effective handling of synchronization on many-core devices.

众核处理器（例如 GPU）已用于加速各种应用：分子动力学、图像处理、数据挖掘、期权定价和线性代数等。尽管它们被广泛采用，但这些设备仍然被认为相对难以使用，因为它们要求程序员熟悉并行编程和硬件操作。特别是，在多核设备上有效部署不规则应用程序还远未可知。然而，许多已建立的和新兴的应用程序（来自社交和计算机网络、电路建模、离散事件模拟、编译器和计算科学）本质上是不规则的，基于图和树等数据结构。这项研究提出了编译器和运行时技术来支持在多核处理器上部署图形和其他不规则应用程序，同时向程序员隐藏底层硬件和软件堆栈的复杂性和异构性。由于不规则应用程序中的并行度严重依赖于数据，因此所提出的编译器技术旨在从与平台无关的高级算法描述开始生成多个特定于平台的代码变体。运行时技术侧重于选择最合适的代码变体及其对硬件和输入数据集的调整。更具体地说，这项研究涵盖了与不规则应用程序相关的三个重要问题：（i）不规则应用程序中嵌套并行性（以可并行嵌套循环和递归函数的形式）的有效处理； (ii) 动态内存分配库的设计，该库可以扩展到多核设备提供的多线程程度，以及适合在动态数据集上运行的应用程序的图形编码方案； (iii) 有效处理多核设备上的同步。

项目成果

Exploring Thread Coarsening on FPGA

探索 FPGA 上的线程粗化

• DOI: 10.1109/hipc53243.2021.00062
• 发表时间: 2022-01
• 期刊: and Analytics (HiPC
• 作者: Zarch, Mostafa Eghbali;Neff, Reece;Becchi, Michela
• 通讯作者: Becchi, Michela

PILOT: a Runtime System to Manage Multi-tenant GPU Unified Memory Footprint

PILOT：管理多租户 GPU 统一内存占用的运行时系统

• DOI: 10.1109/hipc53243.2021.00063
• 发表时间: 2022-01
• 期刊: and Analytics (HiPC
• 作者: Ravi, John;Nguyen, Tri;Zhou, Huiyang;Becchi, Michela
• 通讯作者: Becchi, Michela

Accelerating Random Forest Classification on GPU and FPGA

在 GPU 和 FPGA 上加速随机森林分类

• DOI: 10.1145/3545008.3545067
• 发表时间: 2022-08
• 期刊: ICPP '22: Proceedings of the 51st International Conference on Parallel Processing
• 作者: Shah, Milan;Neff, Reece;Wu, Hancheng;Minutoli, Marco;Tumeo, Antonino;Becchi, Michela
• 通讯作者: Becchi, Michela