Combating Counterfeit Analog and Mixed Signal ICs with Lightweight Embedded Mechanisms and Innovative Electrical Tests

利用轻量级嵌入式机制和创新电气测试打击假冒模拟和混合信号 IC

• 批准号: 1610075
• 负责人: Domenic Forte
• 金额: $ 40万
• 依托单位: University of Florida
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2016
• 资助国家: 美国
• 起止时间: 2016-06-01 至 2020-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1610075&HistoricalAwards=false
• 关键词: Combating; Counterfeit; Analog; Mixed; Signal; Combating; Counterfeit; Analog; Mixed; Signal

Proposal Title: Combating Counterfeit Analog and Mixed Signal ICs with Lightweight Embedded Mechanisms and Innovative Electrical Tests Brief description of project Goals: A comprehensive framework for detecting and avoiding analog and mixed signal counterfeit ICs centered on targeted electrical tests and design structures.Nontechnical Abstract:Globalization has resulted in a substantial rise in all types of counterfeit electronic components reported throughout the supply chain. Aside from the billions lost from IP infringement, counterfeit parts are often of substandard quality, thereby creating risks for the critical systems and infrastructures that incorporate them. Among integrated circuits (ICs), analog and mixed signal (AMS) ICs are the best targets for counterfeiting due to their long product life cycles, high profit margins, prevalence across major markets (industrial, automotive, intelligence, consumer, wireless, compute, etc.), lower complexity, and (v) ease of reverse engineering and cloning older process technology nodes. Given the large number of systems and sectors using AMS electronics, counterfeits have significant impacts on major component manufacturers, original equipment manufacturers, governments, and society. While there exist counterfeit detection approaches based on physical inspection and electrical tests that could be applied to AMS ICs, they are time consuming, destructive, and often require golden (known authentic) information. In addition, new design techniques have been developed to detect counterfeit digital ICs, but these are not well-suited for AMS ICs due to the fundamental differences between analog and digital design. Technical Abstract:This project explores, for the first time, a holistic framework to detect and prevent all types of analog and mixed-signal (AMS) counterfeit ICs. Fundamental challenges to this goal include lack of aging models (needed to detect recycled/used ICs), lack of digital IC features (e.g., test structures, traditional cryptographic modules, etc.), and strict resource constraints of AMS ICs. In this work, these challenges are addressed through the development of innovative electrical tests for detecting recycled and remarked ICs as well as development of lightweight embedded mechanisms for detection/prevention of cloned, overproduced, and recycled ICs. To eliminate the need for golden information and remain applicable to a wide range of ICs, the electrical tests target differences in behavior of general power management circuitry, which are accessible in many large analog, mixed signal, and digital ICs, such as Low Drop-Out Regulators (LDOs) Embedded mechanisms for passive IC counterfeit detection are developed based on fully analog physically unclonable functions (PUFs) and new recycling\aging sensors. While existing mechanisms require digital control logic and an additional pin for access to PUF and sensor output, new low cost-interfaces are developed to make all the proposed approaches easier to adopt. For active prevention, chaotic cryptography (which can be implemented in analog ICs) is exploited for novel IC locking\unlocking mechanisms that prevent overproduced ICs from entering the market. All approaches will be tested in simulation and silicon. Authentic ICs will be acquired and tested against counterfeits available in the PI's lab from industry collaborators. The embedded mechanisms will be incorporated into test ICs and fabricated using standard CMOS processes for validation.

提案标题：用轻巧的嵌入式机制和创新的电气测试对伪造模拟和混合信号进行打击，对项目目标的简要描述：一个用于检测和避免模拟和混合信号伪造的综合框架，该框架以目标电气测试和设计结构为中心。全球化：全球化在所有类型的构造中都在整个供应量中均构成了整体构造。除了因IP侵权而损失的数十亿美元之外，假冒零件通常是不合格的质量，从而为结合它们的关键系统和基础设施带来了风险。在综合电路（ICS）中，模拟和混合信号（AMS）IC是伪造的最佳目标，因为它们的长期产品寿命，高利润率，跨主要市场（工业，汽车，智力，消费者，无线，无线，无线，计算等）的流行率，较低的复杂性，以及（V）较旧的工具和较老的工程技术。鉴于使用AMS电子产品的系统和扇区大量，假冒产品对主要组成部分制造商，原始设备制造商，政府和社会产生了重大影响。尽管存在基于物理检查和可以应用于AMS IC的电气测试的假冒检测方法，但它们耗时，破坏性，通常需要黄金（已知的真实）信息。此外，已经开发了新的设计技术来检测假冒数字IC，但是由于模拟设计和数字设计之间的根本差异，这些技术并不适合AMS IC。技术摘要：该项目首次探讨了一个整体框架，以检测和防止所有类型的模拟和混合信号（AMS）伪造。该目标的根本挑战包括缺乏老化模型（需要检测回收/二手IC），缺乏数字IC特征（例如测试结构，传统加密模块等）以及AMS IC的严格资源限制。在这项工作中，这些挑战是通过开发创新的电测试来解决的，用于检测回收和评估的IC，以及开发轻质嵌入式机制，用于检测/预防克隆，生产过多和再生的ICS。 To eliminate the need for golden information and remain applicable to a wide range of ICs, the electrical tests target differences in behavior of general power management circuitry, which are accessible in many large analog, mixed signal, and digital ICs, such as Low Drop-Out Regulators (LDOs) Embedded mechanisms for passive IC counterfeit detection are developed based on fully analog physically unclonable functions (PUFs) and new recycling\aging sensors.尽管现有的机制需要数字控制逻辑和额外的PIN来访问PUF和传感器的输出，但开发了新的低成本界面，以使所有建议的方法更容易采用。为了进行主动预防，混乱的加密（可以在模拟IC中实施）被利用用于新型IC锁定\解锁机制，以防止过量生产的IC进入市场。所有方法将在模拟和硅中进行测试。将根据行业合作者在PI的实验室中可获得的假冒物获得和测试真实的IC。嵌入式机制将纳入测试IC，并使用标准CMOS工艺进行验证。