SHF: Small: Layout Assessment and Optimization for Disruptive Patterning and Device Technologies

SHF：小型：颠覆性图案化和器件技术的布局评估和优化

• 批准号: 1526877
• 负责人: Puneet Gupta
• 金额: $ 36万
• 依托单位: University of California-Los Angeles
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2015
• 资助国家: 美国
• 起止时间: 2015-06-15 至 2020-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1526877&HistoricalAwards=false
• 关键词: SHF; Small; Layout; Assessment; Optimization

Continued scaling of semiconductor technology is essential to preserve the promise of reduced cost, more functional integration and improved performance - all within the same or smaller energy footprint for electronic systems. With integrated circuit fabrication already working at the edge of its physical limits, the semiconductor industry is likely to see several radical changes in the manufacturing and device technologies in the next few years and decades. The broader impact of this proposal lies partly in the artifacts (software, exploration outcome data, etc.) which would enable the academia and industry communities to assess and optimize advanced semiconductor technologies. In addition to enhancing graduate curriculum and engaging undergraduate students in research, the PI will co-organize the Los Angeles Computing Circle: a summer program to expose high school students to non-traditional aspects of computing. On the manufacturing front, the two radical changes that may be seen are (1) use of Extreme Ultraviolet (EUV) light in lithography which has over 10X smaller wavelength than what is used currently with associated improvement in resolution (i.e., potential to shrink transistor and wire dimensions even further); and (2) adoption of Directed Self Assembly (DSA): a scheme where desired patterns self-assemble onto the wafer with some guidance. The other disruption in electronics technology is likely to come from development of vertically oriented transistors (i.e., the current through them flow in z direction instead of x or y) which hold the promise of reduced sleep power, improved performance, smaller area and amenability to integrate heterogeneous materials. The focus of the project is to enable these disruptive technologies that will require substantial changes in design infrastructure and manufacturing-side software tools to be viable. Algorithms and software frameworks for technology development, design layout generation and manufacturability assessment will be developed.

半导体技术的持续缩放对于保持成本降低，功能性集成和提高性能的承诺至关重要 - 这些都在电子系统的相同或较小的能量足迹内。随着综合电路制造已经在其物理极限的边缘工作，半导体行业可能会在未来几年和几十年中看到制造和设备技术的几个根本变化。 该提案的更广泛的影响在部分在于工件（软件，勘探结果数据等），这将使学术界和行业社区能够评估和优化先进的半导体技术。除了增强研究生课程并吸引本科生从事研究之外，PI还将共同组织洛杉矶计算机圈：一个夏季计划，旨在使高中生接触到计算机的非传统方面。在制造方面，可能看到的两个根本变化是（1）在光刻中使用极端紫外线（EUV）光，其波长超过10倍，比目前与分辨率相关的改进（即可能进一步缩小晶体管和电线尺寸的潜力）； （2）采用定向的自由组装（DSA）：在晶圆上所需模式在晶圆上进行一些指导的方案。电子技术的另一个破坏可能来自垂直面向晶体管的发展（即，通过它们的电流朝z方向而不是x或y流动），这有望有望降低睡眠能力，提高性能，较小的面积，较小的面积和整合异质材料的能力。该项目的重点是实现这些破坏性技术，这些技术将需要在设计基础架构和制造端软件工具上进行实质性变化才能可行。将开发用于技术开发，设计布局生成和制造性评估的算法和软件框架。