SBIR Phase I: Fault Isolation of Open Circuits in Semiconductor Products using Magnetic Current Imaging

SBIR 第一阶段：使用磁流成像对半导体产品中的开路进行故障隔离

• 批准号: 0810388
• 负责人: Antonio Orozco
• 金额: $ 9.99万
• 依托单位: NEOCERA, LLC
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-07-01 至 2008-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0810388&HistoricalAwards=false
• 关键词: SBIR; Phase; Fault; Isolation; Open

This Small Business Innovation Research Phase I research project will extend the capabilities of magnetic current imaging to detect open failures in semiconductor packages with an accuracy of 30 microns to facilitate the integration of semiconductor components and devices into systems. The largest, most difficult problem encountered in packages is electrical opens due to increasing shrinking and complex technology in leading edge designs. The only available techniques are time domain reflectometry with practical resolution of 1-2 mm and time consuming layer-by-layer deprocessing. It is proposed to use magnetic current imaging with a SQUID sensor to solve this critical problem through increasing the frequency detection limit of the equipment to detect high frequency signals at the defect location.The semiconductor industry has a critical need for localization of buried open defects in packages with resolution below 30 microns. The proposed technology is targeting a 30 micron resolution to fill a known gap in fault isolation technology for packaging. For the semiconductor companies it will enable the packaging manufacturing sites to isolate open defects and improve their manufacturing processes to minimize or eliminate these defects quickly so that they can get high quality reliable products to market faster.

这个小型企业创新研究阶段I研究项目将扩展磁电流成像的功能，以检测具有30微米精度的半导体包装中的开放故障，以促进将半导体组件和设备整合到系统中。包装中遇到的最大，最困难的问题是由于前沿设计中的缩小和复杂的技术而开放。唯一可用的技术是时间域反射仪，实际分辨率为1-2毫米，并且逐层逐步淘汰。有人建议将磁电流成像与鱿鱼传感器一起通过增加设备的频率检测极限来检测缺陷位置处的高频信号来解决这个关键问题。半导体行业对在30微米以下的分辨率下的包装中埋藏的打开缺陷的定位至关重要。拟议的技术针对30微米的分辨率，以填补已知的隔离技术的空白，以包装包装。对于半导体公司而言，它将使包装制造地点能够隔离开放缺陷并改善其制造过程，以最大程度地减少或消除这些缺陷，从而使它们能够更快地获得高质量的可靠产品来更快。