SGER: Design Technologies for Nanoscale VLSI

SGER：纳米级 VLSI 设计技术

• 批准号: 0739623
• 负责人: Marios Papaefthymiou
• 金额: $ 15万
• 依托单位: Regents of the University of Michigan - Ann Arbor
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2007
• 资助国家: 美国
• 起止时间: 2007-09-15 至 2009-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0739623&HistoricalAwards=false
• 关键词: SGER; Design; Technologies; Nanoscale; VLSI

ABSTRACT0739623Marios C. PapaefthymiouUniversity of MichiganIntellectual MeritThe continuing scaling of semiconductor process technology brings about new challenges in the designof VLSI systems, while at the same time motivating new approaches for addressing them. Power density inhigh-end integrated systems has already reached performance-limiting levels. Increased device variabilityresults in greater delay uncertainty, dictating the use of larger design margins and further limiting performance. Yet, silicon per device continues to decrease at exponential rates, enabling novel uses of siliconarea. This research project will investigate next-generation design technologies for the realization of nanoscale VLSI systems in silicon. Specifically, this project will focus on the exploration of so-called charge recovery design technologies that enable operation at new levels of power-efficiency while reducing uncertainty due to device variability. In conventional VLSI design, capacitors are switched abruptly between supply and ground, experiencing high peak currents and dissipating all their stored energy as heat across resistive devices. Furthermore, device variability leads to significant uncertainty in the clock arrival times of conventional distribution networks with buffers. In contrast to conventional integrated systems, charge-recovery designs switch capacitors gradually, maintaining low peak currents and returning any undissipated energy back to the power supply. Therefore, charge-recovery designs can potentially lead to substantial reductions in switching power and gate leakage. Moreover, since they rely on buffer-less resonant clock distribution networks, charge-recovery designs are also expected to yield substantial reductions in clock delay uncertainty. The significant potential of charge recovery has so far remained untapped, as it represents a departure from established design practices. The main objective of this project is to explore and assess the potential of charge-recovery technologies, including circuitry, design methodologies, and computing architectures for realizing nanoscale silicon-based VLSI systems with unprecedented levels of power efficiency and performance. Broader ImpactsThe proposed research is expected to have a significant impact on the realization of next-generation VLSIsystems, promoting discovery, teaching, and learning in novel design technologies that address key issues innanoscale process nodes. Broader outcomes of the proposed effort include the integration of research activitiesinto graduate-level courses, the development of lectures and projects for advanced undergraduate-levelcourses, as well as the direct involvement of electrical engineering and computer science majors throughsenior-level design projects. Consistent with the PI's proven record in promoting broad participation, theproposed research and education activities will include participants from underrepresented groups.A1

Abstract0739623Marios C.密歇根州密歇根州的Papaefthymiouuniversity the Smiciconductor Process Technology的持续扩展为VLSI系统的设计带来了新的挑战，同时激发了解决这些问题的新方法。功率密度嵌入式集成系统已经达到了限制性能水平。设备可变性增加了更大的延迟不确定性，决定了较大的设计边缘的使用并进一步限制了性能。 然而，每台设备硅的硅速率继续下降，从而实现了新颖的硅烷烷。 该研究项目将研究下一代设计技术，以实现硅纳米级VLSI系统。具体而言，该项目将集中于探索所谓的电荷恢复设计技术，该技术能够以新的发电水平运行，同时由于设备可变性而降低不确定性。在传统的VLSI设计中，电容器在供应和接地之间突然切换，经历了高峰值电流，并消散了所有存储的能量，因为跨电阻器件的热量。此外，设备可变性会导致带有缓冲区常规分布网络的时钟到达时间的明显不确定性。与传统的集成系统相反，电荷恢复设计开关电容器逐渐保持低峰值电流，并将任何未发射的能量返回到电源。因此，电荷恢复设计可能会导致开关功率和门泄漏的大量降低。此外，由于它们依赖于无缓冲谐振的时钟分配网络，因此电荷回收设计还有望大大减少时钟延迟不确定性。 到目前为止，尚未开发费用的巨大潜力，因为这代表了与既定的设计实践的背离。该项目的主要目的是探索和评估电荷恢复技术的潜力，包括电路，设​​计方法和计算体系结构，以实现基于纳米级硅的VLSI系统，其功率效率和性能水平前所未有。更广泛的影响预计拟议的研究将对下一代VLSISYSYS的实现产生重大影响，从而在新型设计技术中促进发现，教学和学习，以解决关键问题Innanoscale Process节点。拟议的工作的更广泛的结果包括研究活动的整合研究生级课程，开发高级本科生级别的讲座和项目，以及电气工程和计算机科学专业的直接参与通过洋流设计项目。与PI在促进广泛参与方面的可靠记录一致，规定的研究和教育活动将包括来自代表性不足的组的参与者。A1