SHF: Small: Energy-Recycling VLSI Systems
SHF:小型:能量回收 VLSI 系统
基本信息
- 批准号:0916714
- 负责人:
- 金额:$ 45万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2009
- 资助国家:美国
- 起止时间:2009-08-01 至 2013-07-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
"This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."ID: 0916714 Papaefthymiou Marios University of Michigan Ann Arbor SHF:Small: Energy-Recycling VLSI Systems This research project will investigate novel technologies for the design of very-large scale integrated (VLSI) computer systems that achieve unprecedented levels of energy-efficient operation through energy recycling. In contrast to conventional computer systems that consume all the energy supplied to them while computing, energy-recycling computers reclaim and reuse any energy that remains undissipated during their operation. Therefore, they have the potential to operate with substantially lower energy consumption than conventional computers. This project will encompass a broad spectrum of design technologies for energy-recycling computers, including circuitry, computing architectures, and design methodologies. The effectiveness of these technologies will be assessed through the design, fabrication, and experimental evaluation of proof-of-concept hardware prototypes.With power consumption in high-performance microprocessors exceeding 100Watts, the design of energy-efficient computers has become a top priority in electronic design due to reliability concerns caused by excessive heat generation. Furthermore, energy-efficient computers play a key role in the development of new mobile applications due to battery-life considerations. And last, but not least, the power requirements of computing devices, including high-performance servers, desktops, and laptops, is placing an increasing burden on the power grid, with emissions from all these sources growing at a reported annual compound rate of 6% and thus posing a serious environmental concern. The outcomes of this research project can therefore be transformative, resulting in innovative design technologies for realizing next-generation computer systems that achieve unprecedented levels of reliable and energy-efficient operation, enable new mobile applications, and promote sustainability.
"This award is funded under the American Recovery and Reinvestment Act of 2009 (Public Law 111-5)."ID: 0916714 Papaefthymiou Marios University of Michigan Ann Arbor SHF:Small: Energy-Recycling VLSI Systems This research project will investigate novel technologies for the design of very-large scale integrated (VLSI) computer systems that achieve unprecedented levels of energy-efficient operation through energy回收。 与传统的计算机系统相反,这些计算机系统在计算时消耗了所有提供给它们的能量,能量回收计算机会回收并重复使用操作过程中尚未发出的任何能量。 因此,它们具有比传统计算机低得多的能源消耗的潜力。 该项目将涵盖针对能量重新计算机的广泛设计技术,包括电路,计算体系结构和设计方法。 这些技术的有效性将通过概念证明硬件原型的设计,制造和实验评估进行评估。随着超过100瓦计算机的高性能微处理器的功耗,能源有效计算机的设计已成为由于过量发热引起的可靠性问题,因此在电子设计方面已成为高级优先。 此外,由于电池寿命的考虑,节能计算机在新移动应用程序的开发中起着关键作用。 最后但并非最不重要的一点是,包括高性能服务器,台式机和笔记本电脑在内的计算设备的功率要求正在给电网带来越来越多的负担,所有这些来源的排放量以每年的复合率为6%增长,因此引起了严重的环境问题。 因此,该研究项目的结果可以是变革性的,从而产生了创新的设计技术,用于实现下一代计算机系统,这些技术可以实现前所未有的可靠和节能操作,启用新的移动应用程序并促进可持续性。
项目成果
期刊论文数量(0)
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科研奖励数量(0)
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Marios Papaefthymiou其他文献
Marios Papaefthymiou的其他文献
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{{ truncateString('Marios Papaefthymiou', 18)}}的其他基金
SHF: Small: Hardware-Level Security to Side-Channel Analysis Attacks
SHF:小型:针对侧通道分析攻击的硬件级安全性
- 批准号:
1816069 - 财政年份:2018
- 资助金额:
$ 45万 - 项目类别:
Standard Grant
SGER: Design Technologies for Nanoscale VLSI
SGER:纳米级 VLSI 设计技术
- 批准号:
0739623 - 财政年份:2007
- 资助金额:
$ 45万 - 项目类别:
Standard Grant
ITR: Adaptive Information Processing through Precomputation
ITR:通过预计算进行自适应信息处理
- 批准号:
0082876 - 财政年份:2000
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$ 45万 - 项目类别:
Continuing Grant
CAREER: Parallel Integer Programming for Architectural-LevelVLSI Design
职业:架构级 VLSI 设计的并行整数规划
- 批准号:
9796145 - 财政年份:1997
- 资助金额:
$ 45万 - 项目类别:
Continuing Grant
Synchronous VLSI Circuit Optimization via Integrated Retiming and Clock Skew Scheduling
通过集成重定时和时钟偏差调度实现同步 VLSI 电路优化
- 批准号:
9610108 - 财政年份:1997
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$ 45万 - 项目类别:
Continuing Grant
CAREER: Parallel Integer Programming for Architectural-LevelVLSI Design
职业:架构级 VLSI 设计的并行整数规划
- 批准号:
9624587 - 财政年份:1996
- 资助金额:
$ 45万 - 项目类别:
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