Network Processors: Architecture and Design

网络处理器：架构和设计

基本信息

批准号：
0217334
负责人：
Mark Franklin
金额：
$ 25万
依托单位：
Washington University
依托单位国家：
美国
项目类别：
Continuing Grant
财政年份：
2002
资助国家：
美国
起止时间：
2002-09-01 至 2005-02-28
项目状态：
已结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=0217334&HistoricalAwards=false
关键词：
Network Processors Architecture Design

项目摘要

Two forces have exacerbated problems associated with packet processing. First, demands for higher bandwidth and line rates challenge our abilities to perform real-time packet processing. Second, more complex functional requirements and services are being defined that significantly increase packet computational demand. In response, modern routers are being equipped with Network Processors (NPs) that include both general-purpose multiprocessing and special hardware capabilities. NPs push the envelope of our design capabilities. This research aims at quantifying NP design and at developing a performance driven methodology that is cognizant of both physical constraints (e.g., area, power) and the computational requirements of packet applications.Principal architectural approaches (parallelism, pipelining, instruction specialization) are investigated and design procedures for exploiting these architectural paradigms are developed. The NP architecture models along with associated benchmarking lead to a coherent NP design methodology and extend our understanding of real-time computer design.The research directly benefits the rapidly expanding area of NP and router design, and network performance. The techniques utilized are those of classical computer architecture, including the formalization of the design constraints, development of design models, and the use of benchmarks for quantitative model parameterization.

两种力量加剧了与数据包处理相关的问题。首先，要求更高的带宽和线路价格挑战我们执行实时数据包处理的能力。其次，正在定义更复杂的功能需求和服务，以显着增加数据包计算需求。作为响应，现代路由器配备了网络处理器（NP），其中包括通用多功能和特殊硬件功能。 NP推动我们的设计功能的信封。这项研究旨在量化NP设计，并开发一种具有性能驱动的方法，该方法既认识到物理约束（例如，区域，功率）和数据包应用程序的计算要求。研究了这些建筑的原始架构方法（并行性，管道专业，教学专业化），并且是开发了这些建筑范围的设计程序。 NP体系结构模型以及相关的基准测试导致NP设计方法连贯，并扩展了我们对实时计算机设计的理解。该研究直接受益于NP和路由器设计的快速扩展领域以及网络性能。使用的技术是经典计算机架构的技术，包括设计约束的形式化，设计模型的开发以及基准用于定量模型参数化。