延迟感知的高密度闪存系统性能优化研究

In order to increase the storage density and reduce the price of flash memories, high-density flash memory systems such as TLC NAND flash-based systems and QLC NAND flash-based systems emerge as required. However, its performance advantage cannot be fully developed because that data reliability requires advanced error correction codes and applications characteristics become diverse. Latency is an important factor to indicate performance, and it is a key problem that how to establish relationships between data error characteristics and latency induced by advanced error correction codes as well as between application characteristics and system access latency, aiming at optimizing performance of high-density flash memory systems. This project follows the ideas of latency modeling-characteristic analysis-scheme design, and first establishes latency models for key read/write access steps in levels of both device and system, and then analyzes important latency characteristics. Consequently, the read/write optimizations based on advanced error correction codes and access managements based on application characteristics are studied separately, oriented by latency-awareness. Finally, the latency model and optimized designs will be evaluated and verified based on simulated systems and real hardware platforms. The achievements of this project will provide new solutions and strong technical supports for the comprehensive usage of high-density flash memory systems in high-performance computers, data centers and embedded systems.

为了提升闪存的存储密度和降低价格，高密度闪存系统如TLC NAND闪存系统和QLC NAND闪存系统等应运而生。然而由于数据可靠性对高级纠错码的需求和应用程序多样化特征，高密度闪存系统的性能优势无法充分发挥。延迟是性能的重要指标，如何建立数据错误特征和高级纠错码延迟特征之间以及应用程序特征和系统访问之间的密切关系，是优化高密度闪存系统性能的关键问题。本项目拟按照延迟建模—特征分析—方案设计的研究思路，首先在设备级别和系统级别对高密度闪存系统的关键读写访问步骤建立延迟模型并分析重要特征。然后以延迟感知为导向，分别研究基于高级纠错码的读写优化方案和基于应用程序访问特征的系统访问管理优化方案。最后基于模拟仿真系统和真实硬件平台，对延迟模型和优化设计方案进行评估和验证。本项目的研究成果将为高密度闪存系统在高性能计算机、数据中心以及嵌入式等系统中的全面普及提供新的研究思路和强有力的技术支撑。

高密度闪存系统如 TLC NAND 闪存系统和 QLC NAND 闪存系统等拥有闪存存储密度高和价格低的优势，但其性能却存在明显瓶颈。延迟是性能的重要指标，如何建立数据错误特征和高级纠错码延迟特征之间以及应用程序特征和系统访问之间的密切关系，是优化高密度闪存系统性能的关键问题。本项目利用高密度闪存的设备读写延迟特征和系统访问延迟特征，在设备和系统这两个层次分别研究和设计延迟感知的高级纠错码读写方案和应用程序访问延迟机制，实现改善闪存系统由于密度增加和应用程序多样性产生的读写性能下降问题，更加有效地发挥其性能优势。研究内容主要包括高密度闪存系统延迟建模与特征分析、延迟感知的高级纠错码读写方案设计和延迟感知的应用程序访问管理方案设计三个部分。以本项目为依托发表高质量论文8篇和国家发明专利6项，其中论文提出的一系列优化方案对闪存系统的读写延迟、预读效率、尾延迟、垃圾回收性能等实现显著的性能优化效果。因此本项目的研究内容和研究成果对计算机系统结构的深入研究和闪存存储产业的高速发展等方面都具有实际的科学意义。

内容获取失败，请点击重试