通用可扩展神经形态芯片及其关键技术研究

Currently, brain-inspired neuromorphic chip has attracted much attention. However, most neuromorphic chips are application specific integrated circuits (ASICs), which are of poor versatility, and difficult to expand to large scale, and difficult to realize off- and on-line learning simultaneously. In our previous work, learning from the information process mechanism of the brain, we developed a general-purpose and scalable neuromorphic core in the scale of 256*256 based on the discrete digital integrated circuit technology. In this project， we will further develop the core to the scale of 1024*1024, improve the computing function of the neuron module, and improve the versatility and scalability of the core. And then, learning from the hierarchical and organizational structure of the brain, we will use the hardware multiplexing and network on chip (NOC) technologies to extend the chip scale, and then design and tape out multi-core general-purpose neuromorphic chip, which will lay the foundation for large-scale many-core neuromorphic chip. Finally, we will integrate the shallow / deep artificial neural network, spike neural network with the multi-core neuromorphic chip to realize the brain-like recognition and classification functions through off-line learning and on-line learning. This project has important scientific and practical value for large-scale general-purpose neuromorphic or brain-like computing, as well as large-scale brain functional integration and brain-like intelligence.

受大脑神经系统工作机制启发产生的新型神经形态芯片是国内外研究热点。当前神经形态芯片多为专用芯片，通用性差、难扩展，难与众多神经网络算法有效整合，难以同时实现离线和在线学习。前期，申请人借鉴大脑信息处理机制，基于数字CMOS集成电路技术研发了规模为256*256的高通用可扩展神经形态芯片内核。基于此，本课题将进一步扩展神经形态芯片内核规模至1024*1024，完善其神经元模块计算功能，优化其通用性和可扩展性；进而，借鉴大脑分层分块协同工作机制，基于硬件复用和片上网络技术扩展芯片内核数量，研发多核通用神经形态芯片，为大规模众核神经形态芯片研究打下基础；之后，探索神经形态芯片实际应用，将多核神经形态芯片与浅层/深度/脉冲神经网络整合，通过片外离线学习和片上在线学习，实现识别分类、联想记忆等人脑认知功能。本课题对大规模通用神经形态计算和类脑计算、大规模脑功能整合以及类脑智能有重要科学和应用价值。

针对脑启发神经形态芯片面临的扩展难、集成度低、通用性差、算法模型部署难等问题，本课题开展了高通用可扩展神经形态芯片技术研究：（1）建立了内核紧凑化设计技术方案，使得内核硬件开销与其集成的神经元数量弱相关，为大规模神经形态芯片研发提供了理论和技术支撑；（2）基于紧凑化技术研发了全连接神经形态内核，其结构紧凑、可重构、可扩展、且可部署多种模型；（3）基于紧凑性内核研发了三款神经形态芯片，其中103规模神经形态系统在MNIST数据集下获得96.2%的识别准确率、104规模神经形态芯片将神经元集成度提高约5倍、106规模神经形态芯片中单核集成当前最大规模的神经元且神经元集成密度提升两个以上数量级，为构建大规模神经形态芯片提供了实践方案；（4）面向自主神经形态架构，建立了直接训练和间接获取高精度量化/非量化脉冲神经网络模型（SNN）的方法，所构建的STF-SNN模型在 CIFAR10 和 DVS-CIFAR10 上实现95.77%准确率，分别比基于帧和基于事件的信息的非融合 SNN 高 5.01% 和 19.27%，为神经形态芯片的应用提供了算法支撑；（5）建立了SNN模型和算术运算模型高效部署方案，并围绕自主神经形态芯片研发了融合识别-运算-书写功能的智能系统，为研究神经形态芯片迭代关键问题提供了参考平台。本课题形成的关键理论和技术方案对构建大规模、高密度、低功耗、高通用神经形态系统的有重要参考价值，研发的神经形态芯片在边缘智能领域有广阔的应用前景。

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