离子阱量子比特的可扩展三维集成硅光寻址与探测

Qubit is the basic operating unit of quantum computer, while ion trap is one of the research schemes of qubits and one of the research hot topics of quantum computing, which has the advantages of long coherent time and high logic gate fidelity. Currently many laser sources and photomultipliers in free space are normally used for addressing and detection of trapped-ion qubits, and their optical routing system is expensive, comprehensive, large space occupation, high error and low scalability, and is limiting the research and development of quantum computing for many years. Hence, the solid state chip scheme of trapped-ion qubits operation has to be settled urgently. This project will utilize the current semiconductor fabrication technology, and innovatively propose a 3D integration architecture for scalable silicon photonic addressing and detection of trapped-ion qubits, and provide a feasible scheme of chip-level quantum computing. The search contents includes: 1) 3D architecture and mechanism of integrated Si photonic addressing and detection；2) SiN grating coupler array with 30° emission angle and its addressing mechanism, Si-based fluorescence detection device with <200 cps DCR and its error correction model. The overall flow will utilize CMOS process, and will ultimately realize the scalable silicon photonic addressing and detection of trapped-ion qubits on a solid-state integrated chip level, Moreover, it can be integrated with CMOS chip and package substrate with low cost and small footprint, and improve the performance and stability. Finally, this project will build up a new perspective for realizing the chip-level quantum computer.

量子比特是量子计算机的基本操作单元，离子阱是研究量子比特的载体之一及当前国际研究热点之一，具有相干时间长、逻辑门保真度高等优势。目前多采用自由空间多束激光源和光电倍增管进行量子比特的寻址和探测，光路调试系统昂贵复杂且庞大、误差大、可扩展性低，一直制约量子计算科学研究和发展，因此固态芯片级的离子阱方案亟待解决。本项目利用现有半导体制造技术，创新性提出离子阱量子比特的可扩展三维集成硅光寻址与探测的架构，为芯片级的量子计算提供一种可行性方案。研究内容包括：1)三维集成硅光寻址与探测的架构及机理；2）30°出射角氮化硅光栅阵列及其寻址机理、暗计数小于200cps的硅基荧光探测器件及其误差修正模式。全流程采用CMOS工艺，最终实现可扩展的固态集成芯片级的离子阱量子比特的硅光寻址与探测，并可与CMOS芯片和封装基板的微型化低成本集成，提高性能和稳定性，将为实现芯片级的量子计算机构建一个新的思路。

量子比特是量子计算机的基本操作单元，离子阱是研究量子比特的载体之一及当前国际研究热点之一，具有相干时间长、逻辑门保真度高等优势。目前多采用自由空间多束激光源和光电倍增管进行量子比特的寻址和探测，光路调试系统昂贵复杂且庞大、误差大、可扩展性低，一直制约量子计算科学研究和发展，因此固态芯片级的离子阱方案亟待解决。本项目利用现有半导体制造技术，创新性提出离子阱量子比特的可扩展三维集成硅光寻址与探测的架构，为芯片级的量子计算提供一种可行性方案。研究内容包括：1)三维集成硅光寻址与探测的架构及机理；2）大°出射角氮化硅光栅阵列及其寻址机理、紫外光探测器件。全流程采用CMOS工艺，最终实现可扩展的固态集成芯片级的离子阱量子比特的硅光寻址与探测，将为实现芯片级的量子计算机构建一个新的思路。

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