Logic Synthesis for Reversible and Traditional Logic Circuits

可逆和传统逻辑电路的逻辑综合

• 批准号: 261211-2012
• 负责人: Rice, Jacqueline
• 金额: $ 1.31万
• 依托单位: University of Lethbridge
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2016
• 资助国家: 加拿大
• 起止时间: 2016-01-01 至 2017-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=594506
• 关键词: Logic; Synthesis; Reversible; Traditional; Circuits

Today's computer chips are required to be smaller, run faster, and use less power than ever before. Every circuit begins as a mathematical function describing the behaviour to take place, and in the synthesis from function to circuit a variety of parameters must be minimized, such as the number of gates, the number of levels, and the numbers of inputs and outputs. The process must also be done quickly and efficiently, as well as generating a result that is appropriate for the final intended technology and that is feasible for implementation.

当今的计算机芯片需要比以往更小、运行速度更快、功耗更低。每个电路都是从描述要发生的行为的数学函数开始的，在从函数到电路的综合中，必须最小化各种参数，例如门的数量、级别的数量以及输入和输出的数量。该过程还必须快速有效地完成，并生成适合最终预期技术且可行的结果。