Intelligently orchestrating communication in many-core architectures
智能编排多核架构中的通信
基本信息
- 批准号:RGPIN-2014-06033
- 负责人:
- 金额:$ 2.26万
- 依托单位:
- 依托单位国家:加拿大
- 项目类别:Discovery Grants Program - Individual
- 财政年份:2015
- 资助国家:加拿大
- 起止时间:2015-01-01 至 2016-12-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Improvement in communication for computer architectures will have broad impact on the computing industry and will have significant benefits to Canada. Improved communication will enable novel, larger computer systems that can be leveraged by researchers in a wide range of disciplines from medicine to economics. My research will provide greater computational capabilities to enable the researchers in these fields to solve some of society's most pressing issues. There is a critical need for HQP in the area of computer systems. Students trained on this project will gain expertise in architecture, software, compilers, algorithms and circuits and be highly sought after by numerous Canadian companies.
Over the last several decades, the computer industry has doubled the number of transistors per chip with each technology generation (every 18-24 months); this is known as Moore's Law. These high transistor densities have created a power wall, limiting the rate of clock frequency scaling in general purpose processors. As a result, processor vendors such as Intel, AMD and IBM now incorporate multiple processors on a single chip to improve performance, rather than a single core with increased speed and/or complexity. As a result, parallel architectures based on multi-core technology are ubiquitous--they can be found across all types of computer systems from servers to cellphones.
To leverage the computational capabilities of these multiple cores, communication between cores is essential. As with any teamwork activity, the best progress is made when all team members are communicating frequently and working together; it is much the same with parallel computer architectures. Communication plays a critical role in overall system performance. My current research agenda focuses on computer architectural and software techniques to streamline and improve the efficiency of the communication between cores. Poorly architected communication fabrics can lead to performance and power bottlenecks for computing systems. It is projected that the energy expended on communication will exceed that consumed by computation in future generations of computing systems. Although multi-core computing has allowed us to temporarily side-step power issues, power is once again a critical issue; dark silicon, or the inability to power on all parts of the chip simultaneously will become a reality in just a few technology generations. Communication will play a vital role in orchestrating dark silicon systems by efficiently moving data to/from hardware accelerators specifically designed to run computations in the most power-efficient manner.
The long term goals of this research are to
1. Leverage online learning techniques to optimize the performance and energy-efficiency of the communication fabric. By observing and learning from an application’s runtime behaviour, we can tailor the communication fabric to provide greater energy efficiency.
2. Hardware and software optimizations that trade-off accuracy for performance and energy efficiency. Approximate computing proposes to save power by allowing some error to emerge in computations. For example, image processing can tolerate some error that will not be noticeable to the human eye. We will explore the implications of approximate computing on communication requirements and explore the tolerance of these applications to communication errors.
3. Explore the role of communication in dark silicon architectures and hardware optimizations to facilitate improved communication. In current on-chip network architectures, it is often difficult to power-down a subset of the network. We will explore new topologies and architectures that are specifically designed to be partially powered down to support dark silicon.
改进的计算机体系结构通信将对计算行业产生广泛的影响,并将为加拿大带来重大利益。改进的通信将实现新型、更大的计算机系统,可供从医学到经济学等广泛学科的研究人员使用。提供更强大的计算能力,使这些领域的研究人员能够解决一些社会最紧迫的问题。在该项目中接受培训的学生将获得架构、软件、编译器等方面的专业知识。算法和电路受到众多加拿大公司的追捧。
在过去的几十年里,计算机行业每一代技术(每 18-24 个月)使每个芯片的晶体管数量增加一倍;这些高晶体管密度形成了一道功率墙,限制了速度。因此,英特尔、AMD 和 IBM 等处理器供应商现在将多个处理器集成到单个芯片上以提高性能,而不是基于提高速度和/或复杂性的单核。多核技术无处不在——从服务器到手机的所有类型的计算机系统中都可以找到它们。
为了利用这些多个核心的计算能力,核心之间的通信至关重要,与任何团队合作活动一样,当所有团队成员频繁通信并一起工作时,就可以取得最佳进展;这与并行计算机架构的情况非常相似。我目前的研究议程主要集中在计算机架构和软件技术上,以简化和提高内核之间的通信效率。据预测,架构不佳的通信结构可能会导致计算系统的性能和功耗瓶颈。沟通所消耗的能量尽管多核计算使我们能够暂时回避功耗问题,但功耗再次成为一个关键问题,即无法为系统的所有部分供电。通信将在短短几代技术内同时成为现实,通过高效地将数据移入或移出专门设计用于以最节能的方式运行计算的硬件加速器,在协调暗硅系统中发挥至关重要的作用。
这项研究的长期目标是
1. 利用在线学习技术来优化通信结构的性能和能源效率通过观察和学习应用程序的运行时行为,我们可以定制通信结构以提供更高的能源效率。
2. 权衡性能和能源效率的准确性的硬件和软件优化建议通过允许计算中出现一些错误来节省功耗,例如,图像处理可以容忍一些人眼无法察觉的错误。我们将探讨近似计算对通信要求的影响,并探讨这些应用程序对通信错误的容忍度。
3. 探索通信在暗硅架构和硬件优化中的作用,以促进改进的通信在当前的片上网络架构中,通常很难关闭网络的子集,我们将探索新的拓扑和架构。专门设计为部分断电以支持暗硅。
项目成果
期刊论文数量(0)
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{{ truncateString('EnrightJerger, Natalie', 18)}}的其他基金
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- 批准号:
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$ 2.26万 - 项目类别:
Discovery Grants Program - Individual
Ultra Low Power Secure Processors for Emerging Applications at the Edge
适用于边缘新兴应用的超低功耗安全处理器
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RGPAS-2020-00108 - 财政年份:2022
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适用于边缘新兴应用的超低功耗安全处理器
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- 资助金额:
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Discovery Grants Program - Accelerator Supplements
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适用于边缘新兴应用的超低功耗安全处理器
- 批准号:
RGPIN-2020-04179 - 财政年份:2021
- 资助金额:
$ 2.26万 - 项目类别:
Discovery Grants Program - Individual
Ultra Low Power Secure Processors for Emerging Applications at the Edge
适用于边缘新兴应用的超低功耗安全处理器
- 批准号:
RGPAS-2020-00108 - 财政年份:2020
- 资助金额:
$ 2.26万 - 项目类别:
Discovery Grants Program - Accelerator Supplements
Ultra Low Power Secure Processors for Emerging Applications at the Edge
适用于边缘新兴应用的超低功耗安全处理器
- 批准号:
RGPIN-2020-04179 - 财政年份:2020
- 资助金额:
$ 2.26万 - 项目类别:
Discovery Grants Program - Individual
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